vsc870 Vitesse Semiconductor Corp, vsc870 Datasheet
vsc870
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vsc870 Summary of contents
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... Distributed Control Packet Mode, Central Control Cell Mode and Direct Mode • Support for Multicast and Multiple Input Queues VSC870 Block Diagram RTM/TCLK ...
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... Backplane Transceiver General Description The VSC870 serial backplane transceiver has been designed to operate with the VSC880 serial crosspoint switch to establish a synchronous high performance switching system. The VSC870 can also connect directly to another transceiver to act as a high bandwidth backplane interconnect link. The transmitter converts a 32-bit parallel interface operating at 62 ...
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... Data Sheet VSC870 Package Pin Descriptions Symbol Name TXIN[31:0] Transmit Parallel Data In TXTYP[1:0] Transmit Word Type TXEN Transmit Enable RTR Ready To Receive Retransmit Mode/ RTM/TCLK Transmit Cell Clock RFM Read From Mark TXOK Transmit signal OK REN Read Enable MODE[1:0] Mode Control ...
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... This output is high if at least one edge transition is <1MHz O detected every word clock period on the redundant input TTL serial line. This signal goes LOW if the VSC870 is word aligned on <1MHz O the receive side. After initialization, it goes HIGH if there TTL is error in the IDLE words. ...
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... Data Sheet VSC870 Symbol Name DLYEN/ Delay Enable/Cell Clock CCKIN Input FACLPBK Facility Loopback WCLK Word Clock REFCLK Local Reference Clock RESET Reset TESTEN Scan Test Enable LTIME Loop Time Mode VSCTE NOR Chain Test Enable VDDA CMU Power Supply VSSA CMU Ground © ...
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... The VSC870 transceiver can be used in one of the three operation modes: Packet Mode, Cell Mode and Direct Mode. In Packet mode, the VSC870 is intended to work in conjunction with the VSC880 switch chip to provide a self routing switching system and to support variable length data packets. In Cell Mode, the transceiver works in conjunction with the VSC880 switch chip to provide a cell synchronized switching system ...
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... Data Sheet VSC870 The transceiver receives and feeds this serial data stream to a digital CRU to recover the bit clock and deserialize the data stream bit word plus 2 overhead bits at 62.5MHz. The transceiver also uses this recovered clock to serialize its transmit data words that are sent to the switch. In this way, the switch and all the transceivers are frequency-locked to one clock source which is provided by the word clock on the switch card ...
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... HIGH pulse on TXOK. This error is stored internally and if the RESYNEN goes HIGH, the VSC870 will start the link initialization process. The RXOK and TXOK signals can therefore be tied to the RESYNEN signal to start the link initialization process immediately, or the user logic can monitor the RXOK and TXOK signals when OOS is LOW and assert RESYNEN only after an error threshold has been reached ...
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... Data Sheet VSC870 1.2.1 Data Word Format at Transceiver Parallel Interface Data words contain a 32 bit user defined payload which is sent between the transmitting and receiving port cards as shown below. The RXTYP[1:0] and TXTYP[1:0] data word encoding format for different modes are described in later sections ...
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... Data -- D[15] is equal to port 0, and D[0] is equal to port 15. Internet: www.vitesse.com Data Sheet VSC870 G52190-0, Rev 4.1 01/05/01 ...
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... VSC870 1.3 Loopback Mode The VSC870 supports two loopback functions at the serial interface. If the LOOPBACK signal is set HIGH, the serial transmit data is looped back to the CRU on the serial receiving side. The transmitted serial data is generated using the CMU clock. This mode can be used to test the high speed circuitry (except for the serial input/output buffers) using the low speed parallel interface ...
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... VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Figure 1: Packet Mode System TXFIFO Trans RXFIFO VSC870 TXFIFO Trans RXFIFO VSC870 Internet: www.vitesse.com Data Sheet VSC870 Switch Card Switch Chip VSC880 G52190-0, Rev 4.1 01/05/01 ...
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... On the receive side, the packets are delineated by the header word at the beginning and a CRQ word at the end. The word sequence loaded into the VSC870 parallel interface is also shown in the figure below. More details can be found in Application Note 31. ...
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... --------------- Data Payload ---------------- Internet: www.vitesse.com Data Sheet VSC870 ...
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... Data Sheet VSC870 2.2.4 CRQ Format at the Transceiver TXIN[31:0] Interface The connection request command word format at the TXIN[31:0] interface is shown below. The signals CT[2:0] and MD[1:0] are used by the transceiver to control modes of operation that are described later in this section. For a NULL CRQ word, set all the connection bits LOW. ...
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... ------ Active Connections ------ Internet: www.vitesse.com Data Sheet VSC870 --Data ...
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... Data Sheet VSC870 MD[1: Camp-on with Priority Mode 0 1 Multicast with Recast Mode 1 0 Multi Queue Mode Camp-on with Priority means the transceiver sends a repeated sequence of connection request words to the switch at a variable frequency until the request is granted. Multicast with Recast means the transceiver sends a fixed number of connection request words to the switch ...
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... ACK (see figure Page 18 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Internet: www.vitesse.com Data Sheet VSC870 G52190-0, Rev 4.1 01/05/01 ...
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... Data Sheet VSC870 2), it stops reading from the parallel interface by setting REN LOW, sets RTM/TCLK HIGH and starts sending a repeated sequence of CRQ words to the switch which are arbitrated only on the cycle that they arrive. During this operation, the CRQ words are not stored at the switch. If all connections are granted, the transceiver will receive an ACK from the switch ...
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... VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Last D data words from current packet HDR Internet: www.vitesse.com Data Sheet VSC870 IDLE sent to switch for reconfigure time G52190-0, Rev 4.1 01/05/01 ...
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... Data Sheet VSC870 as shown in Figure 3. If DLYEN/CCKIN is HIGH, it waits for N more cycles before it sets REN HIGH. If the counter set by the CT[2:0] bits has expired and the transceiver has not received the ACK signal, it sends out a CRQ word with AOA bit set LOW so that an ACK is returned if any output is granted. The transceiver keeps sending this CRQ word until it receives the ACK signal ...
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... VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION D0 1 Min 9 word clocks 6 word clocks D1-0 D0-N D0-0 1 these bytes are ignored by the transceiver during recast. Data words of the recasted packet. Internet: www.vitesse.com Data Sheet VSC870 D3-0 D4-0 D2-0 G52190-0, Rev 4.1 01/05/01 ...
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... Data Sheet VSC870 Similar to the Unicast/Multicast Camp-on request, in this mode, after the CRQ word is loaded in the transceiver parallel interface, it will transmit the CRQ word to the switch and wait for the ACK signal to be returned. During this time, the user logic should send a maximum of D data words from the parallel interface to the switch. If the transceiver detects the header word for the next packet at the parallel interface, it stops reading from the FIFO, sets RTM/TCLK HIGH and starts sending a sequence of CRQ words to the switch ...
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... SEMICONDUCTOR CORPORATION Last 13 words of current data packet Minimum of 9 clock cycles CRQ Internet: www.vitesse.com Data Sheet VSC870 DX HDR Time to select data queue and reconfigure switch P2 P3 idle idle HDR G52190-0, Rev 4.1 01/05/01 ...
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... Data Sheet VSC870 ALMOST_FULL signal from the receiving FIFO is connected to the RTR pin, and the REN signal is connected to the transmitting FIFO READ_ENABLE signal. In this way, when the receive FIFO is almost full, the transmit FIFO will be disabled from sending data. For multicast, all incoming flow control data is ORed to the transmitting port. ...
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... Cell Mode 3.1 Overview In Cell Mode, a more sophisticated arbitration scheme can be supported by using the VSC870 and the VSC880 in conjunction with a user defined queuing logic on the port cards and a scheduling device on the switch card. To activate this mode, the signal BYPASS is set HIGH and the signal CELLSYN is set HIGH. In this mode, only fixed length data packets (cells) can be supported ...
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... G52190-0, Rev 4.1 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com 01/05/01 VITESSE SEMICONDUCTOR CORPORATION Figure 10: Cell Based System Trans Switch Card VSC870 Trans Communication Bus VSC870 Datatypes SCRAM = 1 Command Word No Scramble Data Word Scramble Data Word Scramble Data Word Scramble Internet: www ...
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... VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION User defined cell period User defined cell period Internet: www.vitesse.com Data Sheet VSC870 G52190-0, Rev 4.1 01/05/01 ...
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... Also, only data words and command words are used (data word and command word formats are shown in section 1.2). An example of a three port card system with no switch chip is shown below. See Application Note 33 for more information. Figure 13: Switch System using VSC870 Transceiver Only Port Card Memory ...
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... High Performance Serial Backplane Transceiver Figure 14: Back Plane Interconnect Using VSC870 Transceivers Port Card Memory System Port Card Memory System 4.2 Data Encoding Format When the BYPASS signal is HIGH, the RXTYP[1:0] and TXTYP[1:0] signals are the direct representation of the overhead bits (B[1:0]) in the serial channels. For data words, the user can use these bits for signaling to the receiving port card ...
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... Data Sheet VSC870 their reference clock inputs from the same source and use their internal CMU as the transmit bit clock. In this case the LTIME signal is set LOW. The transceivers on the port card use the recovered bit clock as the source of the transmit bit clock, so LTIME must be set HIGH ...
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... RXWA Page 32 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Receiving IDLEs Internet: www.vitesse.com Data Sheet VSC870 G52190-0, Rev 4.1 01/05/01 ...
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... Data Sheet VSC870 AC Characteristics Table 1: LVDS and TTL Outputs Parameters Description T TTL Output Rise Time R,TTL T TTL Output Fall Time F,TTL T LVDS Output Rise Time R,LVDS T LVDS Output Fall Time F,LVDS Figure 17: Transmit Data Input Timing Diagram WCLK TXIN[31:0], TXTYP[1:0], DLYEN/CCKIN, TXEN, ABORT RTR ...
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... Reference clock input jitter REFCLK Page 34 © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com VITESSE SEMICONDUCTOR CORPORATION Description Description Internet: www.vitesse.com Data Sheet VSC870 T DEL1 T SKEW T DEL2 Min Typ Max Units ...
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... Data Sheet VSC870 DC Characteristics Table 5: LVDS and TTL Inputs and Outputs Parameters Description V Output HIGH voltage (TTL Output LOW voltage (TTL O/P Common Mode Range (LVDS) OCM V Differential Output Voltage (LVDS) OUT V I/P Common Mode Range (LVDS) ICM V Differential Input Voltage (LVDS) ...
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... Description and +3.3V + 5%) DD DDA DD DDA (V = +3.3V + 5%) DDA DDA , V = +3.3V + 5%) DD DDA (1) ) .................................................................................................... +3.3V (1) (T) .............................................................. 0 Internet: www.vitesse.com Data Sheet VSC870 (Max) Units 1587 mA 200 +125 +150 G52190-0, Rev 4.1 ...
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... Data Sheet VSC870 Package Pin Description Signal Pin VSS A01 REFCLK A02 TXIN[3] A03 TXIN[1] A04 WSIN A05 WSOUT A06 VDD A07 RXOUT[30] A08 RXOUT[29] A09 VDD A10 RXOUT[24] A11 RTR A12 ABORT A13 MODE[0] A14 BYPASS A15 VSS A16 VDD ...
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... R05 VDD TXIN[15] R06 VSS VSS R07 TXIN[8] TXIN[19] R08 TXIN[10] TXTYP[1] R09 TXIN[12] VSS R10 TXIN[14] Internet: www.vitesse.com Data Sheet VSC870 Pin Signal Pin R11 TXIN[16] T06 R12 VDD T07 R13 TXIN[21] T08 R14 TXEN T09 R15 VDD T10 R16 ...
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... Data Sheet VSC870 Package Information © VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012 G52190-0, Rev 4.1 Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com 01/05/01 VITESSE SEMICONDUCTOR CORPORATION 192 BGA Package Internet: www.vitesse.com High Performance Serial Backplane Transceiver ...
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... High Performance Serial Backplane Transceiver Package Thermal Characteristics The VSC870 is packaged in a thermally-enhanced 21mm 192TBGA with an embedded heat sink. The heat sink surface configurations are shown in the package drawings. With natural convection, the junction-to-case thermal resistance is estimated to be 1.49 Table 8. Refer to the application note AN-36 for thermal management and selection of heat sinks. ...