tsc251g1dxxx-l12ced ATMEL Corporation, tsc251g1dxxx-l12ced Datasheet - Page 43

• Manufacturer Part Number: tsc251g1dxxx-l12ced
• Description: 8/16-bit Microcontroller With Serial Communication Interfaces - 32kbytes Rom
• Manufacturer: ATMEL Corporation

Verify Algorithm
4135F–8051–11/06
•
Figure 6. Setup for Programming
Table 36. Programming Modes
Notes:
Fi g u r e 7 s h o ws t h e h a r d wa r e s e tu p ne e d ed to v e r i f y th e T S C8 7 2 51 G 2 D
EPROM/OTPROM or TSC83251G2D ROM areas:
•
•
•
•
•
•
ROM Area
On-chip Code
Memory
Configuration
Bytes
Lock Bits
Encryption Array
PSEN# and the other control signals have to be released to complete a sequence of
programming operations or a sequence of programming and verifying operations.
The chip has to be put under reset and maintained in this state until the completion
of the verifying sequence.
PSEN# and the other control signals (ALE and Port 0) have to be set to a high level.
Then PSEN# has to be to forced to a low level after two clock cycles or more and it
has to be maintained in this state until the completion of the verifying sequence (see
below).
The voltage on the EA# pin must be set to V
The Verifying Mode is selected according to the code applied on Port 0. It has to be
applied until the completion of this verifying operation.
The verifying address is applied on Ports 1 and 3 which are respectively the MSB
and the LSB of the address.
1. Signature Bytes are not user-programmable.
2. The ALE/PROG# pulse waveform is shown in Figure 23 page 59.
(1)
100 ms pulses
A[14:8]
RST
A[7:0]
Mode
Data
1
1
1
1
VPP
EA#/VPP
VDD
V
V
V
V
PP
PP
PP
PP
P3[7:0]
P1[7:0]
RST
EA#/VPP
ALE/PROG#
PSEN#
P0[7:0]
P2[7:0]
PSEN
#
0
0
0
0
TSC87251G2D
ALE/PROG#
VSS/VSS1/VSS2
1 Pulse
1 Pulse
1 Pulse
1 Pulse
DD
XTAL1
VDD
(2)
and ALE must be set to a high level.
AT/TSC8x251G2D
68h
69h
6Bh
6Ch
P0
VDD
4 to 12 MHz
Data
Data
Data
P2
X
P1(MSB) P3(LSB)
16-bit Address
0000h-7FFFh (32
kilobytes)
CONFIG0: FFF8h
CONFIG1: FFF9h
LB0: 0001h
LB1: 0002h
LB2: 0003h
0000h-007Fh
43