tsc251g1dxxx-l12ced ATMEL Corporation, tsc251g1dxxx-l12ced Datasheet - Page 8

• Manufacturer Part Number: tsc251g1dxxx-l12ced
• Description: 8/16-bit Microcontroller With Serial Communication Interfaces - 32kbytes Rom
• Manufacturer: ATMEL Corporation

8
AT/TSC8x251G2D
Table 2. Product Name Signal Description (Continued)
PROG#
Signal
PSEN#
Name
P0.0:7
P1.0:7
P2.0:7
P3.0:7
RXD
RD#
RST
SCL
SCK
SDA
NMI
SS#
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
I
Description
Non Maskable Interrupt
Holding this pin high for 24 oscillator periods triggers an interrupt.
When using the Product Name as a pin-for-pin replacement for a 8xC51
product, NMI can be unconnected without loss of compatibility or power
consumption increase (on-chip pull-down).
Not available on DIP package.
Port 0
P0 is an 8-bit open-drain bidirectional I/O port. Port 0 pins that have 1s
written to them float and can be used as high impedance inputs. To avoid
any paraitic current consumption, Floating P0 inputs must be polarized to
V
Port 1
P1 is an 8-bit bidirectional I/O port with internal pull-ups. P1 provides
interrupt capability for a keyboard interface.
Port 2
P2 is an 8-bit bidirectional I/O port with internal pull-ups.
Port 3
P3 is an 8-bit bidirectional I/O port with internal pull-ups.
Programming Pulse input
The programming pulse is applied to this input for programming the on-chip
EPROM/OTPROM.
Program Store Enable/Read signal output
PSEN# is asserted for a memory address range that depends on bits RD0
and RD1 in UCONFIG0 byte (see ).
Read or 17
Read signal output to external data memory depending on the values of
bits RD0 and RD1 in UCONFIG0 byte (see Table 13, Page 20).
Reset input to the chip
Holding this pin high for 64 oscillator periods while the oscillator is running
resets the device. The Port pins are driven to their reset conditions when a
voltage greater than V
This pin has an internal pull-down resistor which allows the device to be
reset by connecting a capacitor between this pin and VDD.
Asserting RST when the chip is in Idle mode or Power-Down mode returns
the chip to normal operation.
Receive Serial Data
RXD sends and receives data in serial I/O mode 0 and receives data in
serial I/O modes 1, 2 and 3.
TWI Serial Clock
When TWI controller is in master mode, SCL outputs the serial clock to
slave peripherals. When TWI controller is in slave mode, SCL receives
clock from the master controller.
SPI Serial Clock
When SPI is in master mode, SCK outputs clock to the slave peripheral.
When SPI is in slave mode, SCK receives clock from the master controller.
TWI Serial Data
SDA is the bidirectional TWI data line.
SPI Slave Select Input
When in Slave mode, SS# enables the slave mode.
DD
or V
SS
.
th
Address Bit (A16)
IH1
is applied, whether or not the oscillator is running.
4135F–8051–11/06
Alternate
Function
AD7:0
A15:8
P3.7
P3.0
P1.6
P1.6
P1.7
P1.4
–
–
–
–
–
–