tsc251g1dxxx-l12ced ATMEL Corporation, tsc251g1dxxx-l12ced Datasheet - Page 49
tsc251g1dxxx-l12ced
Manufacturer Part Number
tsc251g1dxxx-l12ced
Description
8/16-bit Microcontroller With Serial Communication Interfaces - 32kbytes Rom
Manufacturer
ATMEL Corporation
Datasheet
1.TSC251G1DXXX-L12CED.pdf
(77 pages)
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Waveforms in Page Mode
4135F–8051–11/06
Figure 10. External Bus Cycle: Data Write (Non-Page Mode)
Note:
Figure 11. External Bus Cycle: Code Fetch (Page Mode)
Note:
P2/A16/A17
P0/A16/A17
PSEN#
WR#
ALE
1. The value of this parameter depends on wait states. See Table 39 and Table 40.
1. The value of this parameter depends on wait states. See Table 39 and Table 40.
2. A page hit (i.e., a code fetch to the same 256-byte “page” as the previous code fetch)
3. During a sequence of page hits, PSEN# remains low until the end of the last page-hit
P0
requires one state (2·T
a page miss requires two states (4·T
cycle.
ALE
P2
(3)
TLHLL(1)
TAVLL(1)
T
AVWL2
TLHLL(1)
TAVLL(1)
T
AVWL1
T
LHAX
(1)
OSC
A7:0/A16/A17
Page Miss(2)
T
A7:0
T
T
(1)
AVDV2
(1)
LHAX
AVRL
);
T
A15:8
LLAX
T
A15:8/A16/A17
TLLRL(1)
T
AVDV1
(1)
(1)
(1)
RLAZ
T
LLAX
(1)
TWLWH(1)
OSC
TRLDV(1)
).
AT/TSC8x251G2D
Instruction In
T
T
D7:0
QVWH
AXDX
Data Out
T
D7:0
T
WHAX
WHQX
T
AVDV3
A7:0/A16/A17
T
Page Hit(2)
WHLH
T
T
(1)
RHDZ1
RHDX
Instruction In
D7:0
T
RHAX
49
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