adv7340 Analog Devices, Inc., adv7340 Datasheet - Page 15

• Manufacturer Part Number: adv7340
• Description: Multiformat Video Encoder, Six 12-bit Noise Shaped Video Dacs
• Manufacturer: Analog Devices, Inc.

P_HSYNC
P_BLANK
Y OUTPUT
P_VSYNC
Y9 TO Y2/
a = 32 CLKCYCLES FOR 525p
a = 24 CLKCYCLES FOR 625p
AS RECOMMENDED BY STANDARD
b(MIN) = 244 CLKCYCLES FOR 525p
b(MIN) = 264 CLKCYCLES FOR 625p
c = PIPELINE DELAY. PLEASE REFER TO RELEVANT PIPELINE DELAY. THIS CAN BE FOUND IN THE DIGITAL TIMING
SPECIFICATION SECTION OF THE DATA SHEET.
A FALLING EDGE OF HSYNC INTO THE ENCODER GENERATES A SYNC FALLING EDGE ON THE OUTPUT AFTER A TIME
EQUAL TO THE PIPELINE DELAY.
Y9 TO Y0
a AND b AS PER RELEVANT STANDARD.
c = PIPELINE DELAY. PLEASE REFER TO RELEVANT PIPELINE DELAY. THIS CAN BE FOUND IN THE DIGITAL TIMING
SPECIFICATION SECTION OF THE DATA SHEET.
A FALLING EDGE OF HSYNC INTO THE ENCODER GENERATES A FALLING EDGE OF TRI-LEVEL SYNC ON THE OUTPUT
AFTER A TIME EQUAL TO THE PIPELINE DELAY.
Y OUTPUT
P_HSYNC
P_BLANK
Y9 TO Y2/
C9 TO C2/
P_VSYNC
C9 TO C0
Y9 TO Y0
Figure 16. HD-SDR, 16-/20-Bit, 4:2:2 YCrCb ( HSYNC / VSYNC ) Input Timing Diagram
Figure 15. ED-DDR, 8-/10-Bit, 4:2:2 YCrCb ( HSYNC / VSYNC ) Input Timing Diagram
a
a
c
c
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b
b
Cb0
Cb0
Y0
Cr0
Y1
Y0
ADV7340/ADV7341
Cb2
Y2
Cr0
Cr2
Y3
Y1