mc33970 Freescale Semiconductor, Inc, mc33970 Datasheet - Page 12

• Manufacturer Part Number: mc33970
• Description: Dual Gauge Driver Integrated Circuit With Improved Damping Algorithms
• Manufacturer: Freescale Semiconductor, Inc

SPI PROTOCOL DESCRIPTION
synchronous, 16-bit serial synchronous interface data
transfer and four I/O lines associated with it: Chip Select (
Serial Clock (SCLK), Serial Input (SI), and Serial Output
timing diagrams shown in
Table 5. Data Transfer Timing
12
33970
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
The SPI interface has a full-duplex, three-wire
This section provides a description of the 33970 SPI behavior. To follow the explanations below, refer to
Notes
Note SO is tri-stated when
1. SO is tri-stated when
2. D15, D14, D13, ..., and D0 refer to the first 16 bits of data into the 33970.
3. D15
4. OD15, OD14, OD13, ..., and OD0 refer to the first 16 bits of fault and status data out of the 33970.
SCLK
SCLK
CS
CS
SO
SO
CS
CS
SI
SI
(1-to-0)
(0-to-1)
Pin
SO
SI
*
, D14
Output shift register is loaded here.
*
, D13
OD15
OD15
D15
D15
Figure 6
*
, ..., and D0
OD14
D14
D14
OD14
CS
CS
is logic [1].
and
is logic [1].
D13
OD13
D13
OD13
Figure 7. Multiple 16-Bit Word SPI Communication
SO pin is enabled.
33970 configuration and desired output states are transferred and executed according to the data in
the Shift registers.
Will change state on the rising edge of the SCLK pin signal.
Will accept data on the falling edge of the SCLK pin signal.
Figure 6. Single 16-Bit Word SPI Communication
FUNCTIONAL DEVICE OPERATION
Figure
*
LOGIC COMMANDS AND REGISTERS
refer to the most recent entry of program data into the 33970.
D12
OD12
D12
OD12
7.
D11
D11
OD11
OD11
OPERATIONAL MODES
D10
OD10
D2
OD2
CS
D9
D1
),
OD9
OD1
D8
D0
OD8
OD0
(SO). The SI/SO pins of the 33970 follow a first in/first out
(D15/D0) protocol with both input and output words
transferring the most significant bit first. All inputs are
compatible with 5.0 V CMOS logic levels.
D15
D7
OD7
D15
*
D14
D6
OD6
D14
Description
*
D13
D5
OD5
D13
*
D4
D4
OD4
OD4
Analog Integrated Circuit Device Data
D3
D3
OD3
OD3
D2
D2
OD2
*
D2
D1
Freescale Semiconductor
D1
OD1
*
D1
D0
D0
Table 5
*
OD0
D0
and to the