mc33970 Freescale Semiconductor, Inc, mc33970 Datasheet - Page 30

• Manufacturer Part Number: mc33970
• Description: Dual Gauge Driver Integrated Circuit With Improved Damping Algorithms
• Manufacturer: Freescale Semiconductor, Inc

DEFAULT MODE
internal or external reset prior to SPI communication. An
internal reset occurs during V
below 4.0 V. An external reset is initiated by the
driven to a logic [0]. With the exception of the RTZCR full step
time, all of the specific pin functions and internal registers will
operate as though all of the addressable configuration
register bits were set to logic [0]. This means, for example, all
of the outputs will be disabled after a power-up or external
reset, and SO flag ST6 is set, indicating an undervoltage
event. Anytime an external reset is exerted and the default is
restored, all configuration parameters (e.g., clock calibration,
maximum speed, RTZ parameters, etc.) are lost and must be
reloaded.
FAULT LOGIC REQUIREMENTS
they occur:
of the SO pin with a valid SPI message.
likely an overcurrent condition will become a thermal issue
and be reported.
OVERTEMPERATURE FAULT REQUIREMENTS
circuitry, which shuts off the affected gauge driver when
excessive temperatures are detected. In the event of a
thermal overload, the affected gauge driver is automatically
disabled. The overtemperature fault is flagged via the OT0
and/or OT1 device status bits. The indicating flag continues
to be set until the affected gauge is successfully re-enabled,
30
33970
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Default mode refers to the state of the 33970 after an
The 33970 device indicates each of the following faults as
• Overtemperature fault
• Undervoltage V
• Overvoltage V
• Clock out of spec
These fault bits remain enabled until they are clocked out
Overcurrent faults are not reported directly; however, it is
The 33970 incorporates overtemperature protection
PWR
PWR
DD
power-up or if V
RST
PWR
pin
falls
provided the junction temperature has fallen to a temperature
below the hysteresis level.
OVERVOLTAGE FAULT REQUIREMENTS
the maximum specified in
an Overvoltage Shutdown condition can result in uncertain
pointer positions. Therefore, the pointer position should be
re-calibrated. The master will be notified of an overvoltage
event via the SO pin if the device status is selected.
Overvoltage detection and notification occurs regardless of
whether the gauge(s) are enabled or disabled.
OVERCURRENT FAULT REQUIREMENTS
device to rely on thermal shutdown to protect itself.
UNDERVOLTAGE FAULT REQUIREMENTS
pointer positions. Therefore, the internal clock and the pointer
position may require re-calibration. The state machine
continues with V
the coil voltages may be clipped. The master can be notified
of an undervoltage event via the SO pin. Undervoltage
detection and notification are disabled if both outputs are
disabled.
RESET (SLEEP MODE)
level falls below the V
Characteristics table under
device resets and powers up in the Default mode. Similarly,
If the
default state. The device consumes the least amount of
current (I
also referred to as the Sleep mode.
The device is capable of surviving V
Output currents are limited to safe levels allowing the
Undervoltage V
The device can reset internally or externally. If the V
RST
DD
pin is driven to a logic [0], the device resets to its
and I
PWR
PWR
PWR
voltage levels as low as 4.0 V; however,
DDUV
) when the
Analog Integrated Circuit Device Data
conditions may result in uncertain
Table
level (refer to the Static Electrical
POWER
2. V
RST
Freescale Semiconductor
PWR
INPUT, page 5), the
pin is logic 0]. This is
PWR
levels resulting in
voltages within
DD