mc33970 Freescale Semiconductor, Inc, mc33970 Datasheet - Page 18

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mc33970

Manufacturer Part Number
mc33970
Description
Dual Gauge Driver Integrated Circuit With Improved Damping Algorithms
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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(D3:D0) and RC4 (D4), determine the full step time and,
therefore, the rate at which the pointer will move during an
RTZ event. The values of D12:D11 determine the multiplier
(M) is used in equation (1) (refer to page 17).
preloaded into the RTZ integration accumulator to adjust the
detection threshold. Values range from -1 (00000000) to -
1099 (11111111) as shown in
(blanking (t)).
(D12:D11) and RC4 (D4), determine the time variables used
to calculate the full step times with equations (1) or (2)
illustrated above. RC3:RC0 determines the ∆t time. The ∆t
values range from 0 (0000) to 61.440 ms (1111) and are
shown in
calculate the full step time if RC3:RC0 = 0000. Use
equation (1) for all other combinations of RC3:RC0.
SO Communication
as configured with the PECCR command bits PE11:PE8, is
loaded into the output register and the data is clocked out
MSB (OD15) first. Following a
determines if the shifted-in message was of a valid length (a
valid message length is one that is greater than 0 bits and a
multiple of 16 bits), and if so, latches the incoming data into
the appropriate registers.
18
33970
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
The bits in
RC12:RC11 (D12:D11) — These bits, along with RC3:RC0
RC12:RC11 = M
• 00 = 1
• 01 = 2
• 10 = 4
• 11 = 8 (Not to be used for design)
RC10:RC5 (D10:D5) — These bits determine the value
RC4 (D4) — This bit determines the RTZ blanking time
• 0 = 512 µs
• 1 = 768 µs
RC3:RC0 (D3:D0) — These bits, along with RC12:RC11
Note Equation (2) (refer to page 17) is only used to
When the
Table
Table 14. RTZCR Accumulator Offset
CS
Table 12
RC10
13. The default ∆t is 0 (0011).
0
0
0
0
0
1
pin is pulled low, the internal status register,
.
.
.
are write-only.
RC9
0
0
0
0
0
1
.
.
.
CS
Table
transition 0 to 1, the device
RC8
0
0
0
0
0
1
.
.
.
14.
RC7
0
0
0
0
1
1
.
.
.
RC6
0
0
1
1
0
1
.
.
.
RC5
0
1
0
1
0
1
.
.
.
Table 13. RTZCR Full Step Time
is now able to accept new status information. Fault status
information will be latched and held until the Device Status
Output register is selected and it is clocked out via the SO. If
the message length was determined to be invalid, the fault
information will not be cleared and will be transmitted again
during the next valid SPI message. Pointer status information
bits (e.g., pointer position, velocity, and commanded position
status) will always reflect the real time state of the pointer.
At this time, the SO pin is tri-stated and the status register
RC3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Preload Value
(PV)
63
0
1
2
3
4
.
.
.
RC2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Analog Integrated Circuit Device Data
Initial Accumulator
Value = (-16 x PV) -1
RC1
-1009
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
-17
-33
-49
-65
-1
.
.
.
Freescale Semiconductor
RC0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
∆t (ms)
12.288
16.384
20.480
24.576
28.672
32.768
36.864
40.960
45.056
49.152
53.248
57.344
61.440
4.096
8.192
0

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