mc33970 Freescale Semiconductor, Inc, mc33970 Datasheet - Page 16

• Manufacturer Part Number: mc33970
• Description: Dual Gauge Driver Integrated Circuit With Improved Damping Algorithms
• Manufacturer: Freescale Semiconductor, Inc

Table 9. Gauge 0 Position Register (POS0R)
valid commands.
.
Table 10. Gauge 1 Position Register (POS1R)
valid commands.
Gauge 1. Pointer positions can range from 0
(000000000000) to position 4095 (111111111111). For a
step motor requiring 12 microsteps per degree of pointer
movement, the maximum pointer sweep is 341.25°
(4095 ÷ 12).
Address 100 — Gauge Return to Zero Register (RTZR)
is written to return the gauge pointers to the zero position.
During an RTZ event, the pointer is returned to zero using full
steps, where only one coil is driven at any point in time. The
back electromotive force (EMF) signal present on the non-
Table 11. Return to Zero Register (RTZR)
logic [0] for valid commands.
RTZ event.
16
33970
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Write
Write
Write
Read
Read
Read
Bits
Bits
Bits
The bits in
P0 12 (D12) — This bit must be transmitted as logic [0] for
The bits in
P1 12 (D12) — This bit must be transmitted as logic [0] for
P1 11:P1 0 (D11:D0) — Desired pointer position of
Gauge Return to Zero Register (RTZR) (refer to
The register bits in
RZ12:RZ5 (D12:D5) — These bits must be transmitted as
RZ4 (D4) — This bit is used to enable an unconditional
• 0 = Automatic Return to Zero
• 1 = Unconditional Return to Zero
D12
D12
D12
–
0
–
0
–
0
Table 9
Table 10
P1 11
P0 11
D11
D11
D11
–
–
0
–
Table 11
are write-only.
are write-only.
P0 10
P1 10
D10
D10
D10
–
–
–
0
are write-only.
P1 9
P0 9
D9
D9
D9
–
–
–
0
P0 8
P1 8
D8
D8
D8
–
–
–
0
Table
P0 7
P1 7
D7
D7
11)
D7
–
–
–
0
Address 010
Address 011
Address 100
P0 6
P1 6
D6
D6
D6
–
Gauge 0. Pointer positions can range from 0
(000000000000) to position 4095 (111111111111). For a
step motor requiring 12 microsteps per degree of pointer
movement, the maximum pointer sweep is 341.25°.
–
driven coil is integrated and its results are stored in an
accumulator.
Gauge 0 if RZ0 is logic [0], and Gauge 1 if RZ0 is logic [1],
respectively. Similarly, a logic [0] written to bit RZ1 disables a
Return to Zero for Gauge 0 when RZ0 is logic [0], and
Gauge 1 when RZ0 is logic [1], respectively.
commands.
logic [0] results in a typical RTZ event, automatically
providing a Stop when a stall condition is detected. A logic [1]
will result in RTZ movement, causing a Stop if a logic [0] is
written to bit RZ0. This feature is useful during development
and characterization of RTZ requirements.
–
0
valid commands.
properly sequence the integrator, depending upon the
desired zeroing direction.
P0 11:P0 0 (D11:D0) — Desired pointer position of
A logic [1] written to bit RZ1 enables a Return to Zero for
Bits D12:D5 and D3:D2 must be at logic [0] for valid RTZR
Bit RZ4 is used to enable an unconditional RTZ event. A
RZ3 (D3) — This bit must be transmitted as logic [0] for
RZ2 (D2) — Return to Zero Direction bit. This bit is used to
• 0 = Return to Zero will occur in the CCW direction
• 1 = Return to Zero will occur in the CW direction
(PE7 = 0)
(PE7 = 1)
P0 5
P1 5
D5
D5
D5
–
–
–
0
P0 4
P1 4
RZ4
D4
D4
D4
–
–
–
Analog Integrated Circuit Device Data
P0 3
P1 3
D3
D3
D3
–
–
–
0
Freescale Semiconductor
P02
P1 2
RZ2
D2
D2
D2
–
–
–
P1 1
RZ1
P01
D1
D1
D1
–
–
–
P0 0
P1 0
RZ0
D0
D0
D0
–
–
–