mc33742 Freescale Semiconductor, Inc, mc33742 Datasheet
mc33742
Available stocks
Related parts for mc33742
mc33742 Summary of contents
Page 1
... L3 Safe Circuitry WDOG INT ECU Local HS Supply isted CANH Tw TXD CAN Bus RXD CANL Pair GND Document Number: MC33742 Rev. 10.0, 5/2007 33742 33742S SYSTEM BASIS CHIP EP SUFFIX (PB-FREE) 98ARH99048A 48-PIN QFN ORDERING INFORMATION Temperature Package Range ( SOICW - 40°C to 125°C ...
Page 2
DEVICE VARIATIONS Table 1. Device Differences During a Reset Condition Part No. Reset Duration 33742 15 ms (typical) 33742S 3.5 ms (typical) 33742 2 DEVICE VARIATIONS Device Differences The duration the pin is asserted low when the Reset mode is ...
Page 3
VSUP CANH CANL Figure 2. 33742 Simplified Internal Block Diagram Analog Integrated Circuit Device Data Freescale Semiconductor INTERNAL BLOCK DIAGRAM V2CTRL VSUP Monitor Dual Voltage Regulator 5 200 mA V1 Monitor Mode Control ...
Page 4
PIN CONNECTIONS Table 2. 33742 28-Pin Definitions A functional description of each pin can be found in the Pin Pin Name Formal Name 1 RXD Receive Data 2 TXD Transmit Data 3 VDD Voltage Digital Drain 4 RST Reset Output ...
Page 5
NC 1 SCLK 2 MISO 3 MOSI WDOG 6 RXD 7 8 TXD VDD 9 RST 10 11 INT NC 12 Table 3. 33742 48-Pin Definitions A functional description of each pin can be found in the ...
Page 6
PIN CONNECTIONS Table 3. 33742 48-Pin Definitions (continued) A functional description of each pin can be found in the Pin Pin Name Formal Name 26 V2 Voltage Source 2 27 V2CTRL Voltage Source 2 Control 28 VSUP Voltage Supply 29 ...
Page 7
Table 4. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Rating ELECTRICAL RATINGS Power Supply Voltage at VSUP Continuous (Steady-State) Transient Voltage (Load ...
Page 8
ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS Table 4. Maximum Ratings (continued) All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device. Rating THERMAL RATINGS Operating Temperature Ambient Junction Storage ...
Page 9
STATIC ELECTRICAL CHARACTERISTICS Table 5. Static Electrical Characteristics Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic INPUT PIN (VSUP) Supply Voltage Nominal DC Voltage ...
Page 10
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic INPUT PIN (VSUP) (CONTINUED) (14) ...
Page 11
Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic (18) OUTPUT PIN (VDD) (CONTINUED) Temperature Threshold Difference Reset Threshold ...
Page 12
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic TRACKING VOLTAGE REGULATOR (V2) V2 ...
Page 13
Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic LOGIC INPUT PINS (MOSI, SCLK, CS) High-Level Input Voltage Low-Level ...
Page 14
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic OUTPUT PIN (HS) Driver Output ...
Page 15
Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic PINS (CANH AND CANL) Bus Pin Common Mode Voltage Differential ...
Page 16
ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 5. Static Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic DIAGNOSTIC INFORMATION (CANH AND CANL) ...
Page 17
DYNAMIC ELECTRICAL CHARACTERISTICS Table 6. Dynamic Electrical Characteristics Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic DIGITAL INTERFACE TIMING (SCLK, CS, MOSI, MISO) SPI ...
Page 18
ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 6. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic STATE MACHINE TIMING (CS, SCLK, ...
Page 19
Table 6. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic STATE MACHINE TIMING (CS, SCLK, MOSI, MISO, WDOG, INT) (CONTINUED) ...
Page 20
ELECTRICAL CHARACTERISTICS DYNAMIC ELECTRICAL CHARACTERISTICS Table 6. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 4.75 V ≤ V2 ≤ 5.25 V, 5.5 V ≤ V noted reflect the approximate parameter mean at T Characteristic CAN MODULE – SIGNAL EDGE ...
Page 21
WSCLKH LEAD SCLK t SISU MOSI Undefined t VALID t SOEN MISO Note Incoming data at MOSI pin is sampled by the 33742 at SCLK falling edge. Outgoing data at MISO pin is set by the 33742 ...
Page 22
FUNCTIONAL DESCRIPTION INTRODUCTION The 33742 and the 33742S are system basis chips (SBCs) dedicated to automotive applications. Their functions include the following: • One fully protected 5.0 V voltage regulator with 200 mA total output current capability available at the ...
Page 23
SERIAL DATA CLOCK (SCLK) SCLK is the Serial Data Clock input pin of the serial peripheral interface. MASTER IN SLAVE OUT (MISO) MISO is the Master In Slave Out pin of the serial peripheral interface. Data is sent from the ...
Page 24
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES FUNCTIONAL DEVICE OPERATION SUPPLY VOLTAGE AT VSUP The 33742 receives its operating voltage via the VSUP pin. An external diode is needed in series with the VSUP pin and the supply voltage to protect the ...
Page 25
NORMAL MODE In Normal mode, both the and V2 regulators are in the VDD ON state. All functions are available in this operating mode (watchdog, wake-up input reading through SPI, HS activation, and CAN communication). The watchdog timer is running ...
Page 26
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES Stop VDD: ON (Limited Current Capability), V2: OFF, I HS:OFF or Cyclic Sense Sleep VDD: OFF, V2: OFF L3, Cyclic Sense HS: OFF or Cyclic Normal Same as Normal (38) Debug Standby Same ...
Page 27
SPI Stop/Sleep Command SPI CS WATCHDOG SOFTWARE (RST AND WDOG) (SELECTABLE WATCHDOG WINDOW OR WATCHDOG TIME-OUT) A watchdog is used in the SBC Normal and Standby modes for monitoring the MCU operation. The watchdog timer may be implemented as either ...
Page 28
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES VDD RST WDOG SPI Clear WDOG SPI CS WAKE-UP CAPABILITIES Several wake-up capabilities are available to the SBC when Sleep or Stop mode. When a wake-up has occurred, the wake-up event is ...
Page 29
Reset Counter (3.4 ms) Expired Reset V Timeout 350 ms & Nostop Power Down (V High Temperature Denotes priority State Machine Description Nostop = Nostop bit = 1 ! Nostop = Nostop bit ...
Page 30
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES DEBUG MODE: HARDWARE AND SOFTWARE DEBUG WITH THE 33742 When a SBC, and the MCU it serves, is used on the same printed circuit board, both the MCU software and the 33742 operation must be ...
Page 31
Normal Request Normal Wake-Up Stop (1) Normal Request R R Stop Debug Standby Debug (1) If Stop mode is entered entered without watchdog, no matter the WDSTOP bit. (E) Debug mode entry point (Step 5 of the Debug ...
Page 32
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES MCU FLASH PROGRAMMING CONFIGURATION To allow for new software to be loaded into a SBC’s MCU NVM or to standalone EEPROM or Flash, the 33742 is capable of having (1) VSUP applied ...
Page 33
CAN PHYSICAL INTERFACE The SBC features a high-speed CAN physical interface for bus communication from 60 kbps up to 1.0 Mbps. simplified block diagram of the CAN interface of the 33742. V2 SPI Control TXD Differential RXD SPI Control VSUP ...
Page 34
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES TXD CANH CANL RXD CAN Recessive State TXD AND RXD PINS The TXD pin has an internal pullup to V2. The state of TXD depends on the V2 status. RXD is a push-pull structure, supplied ...
Page 35
Table 10. CAN Interface / 33742 Modes and Pin Status — Operation without Ballast on V2 CAN Mode Mode (Controlled by SPI) Unpowered – Reset (with Ballast) – Normal Request – without Ballast. V2 Connected to VDD Standby without Normal ...
Page 36
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES TXD CANH Dominant CANH CANL/CANH Recessive 2.5 V CANL CANL Dominant RXD CAN in TXRX Mode Figure 21. CAN Signals in TXRX and Sleep Modes CAN IN SLEEP MODE WITH WAKE-UP ENABLE When the CAN ...
Page 37
Figure 23 illustrates how the wake-up signal is generated. First the CAN signal is detected by a low consumption receiver (WU receiver). Then the signal passes through a pulse width filter, which discards the undesired pulses. The pulse must have ...
Page 38
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES H5 TXD Hg Logic Diagnostic Lg L5 Table 11. Short to GND, Short to VSUP , and Short to 5.0 V (VDD) Detection Truth Table Driver Recessive State Failure Description Lg (Threshold 1. ...
Page 39
DETECTION PRINCIPLE In the recessive state, if one of the two bus lines is shorted to GND, VDD, or VSUP, then voltage at the other line follows the shorted line due to bus termination resistance and the high impedance of ...
Page 40
FUNCTIONAL DEVICE OPERATION OPERATIONAL MODES RXD FAILURE DETECTION The SBC senses the RXD output voltage at each LOW-to- HIGH transition of the differential receiver. Excluding internal propagation delay, RXD output should be LOW when the differential receiver is LOW. In ...
Page 41
DEVICE FAULT OPERATION describes the relationship between device fault or warning and the operation of the Table 12 Table 12. Fault / Warning VDD Fault / Warning Battery Fail Turn OFF VDD Temperature Warning flag only. Pre-Warning Leave as is ...
Page 42
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS SPI INTERFACE AND REGISTER DESCRIPTION DATA FORMAT DESCRIPTION Figure 27 illustrates an 8-bit byte corresponding to the 8 bits in a SPI register. The first three bits are used to identify the internal ...
Page 43
MODE CONTROL REGISTER (MCR) Tables 15 through 17 describes the various Mode Control Registers. Table 15. Mode Control Register MCR R/W $000b W R Reset Value – (50) Reset Condition (Write) – Notes 49. BATFAIL bit cannot be set by ...
Page 44
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS RESET CONTROL REGISTER (RCR) and contain various Reset Control Register information. Tables 18 19 Table 18. Reset Control Register RCR R/W W $001b R Reset Value – Reset Condition – POR, RESET, STO2NR ...
Page 45
HIGH-SPEED CAN TRANSCEIVER MODES The MODE bit (D0) controls the state of the CAN interface, TXRX or Sleep mode rate when the CAN module is in TXRX, and it controls the wake-up option (wake-up enable or disable) when the CAN ...
Page 46
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Table 25. HSON Control Bits Logic HS OFF, in Normal and Standby modes ON, in Normal and Standby modes. 1 Notes 57. When HS is turned OFF due to an overtemperature ...
Page 47
Table 28. Wake-Up Register Control Bits LCTR3 LCTR2 LCTR1 Don’t care. Table 29. Wake-Up Register Status Bits Name Logic L3WU 0 or ...
Page 48
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Table 31. TIM1 Control Bits WDW WDT1 WDT0 Window ...
Page 49
Cyclic Sense Timing, ON Time HS ON Cyclic Sense Timing, OFF Time HS HS OFF Sample Figure 30. HS Operation When Cyclic Sense Is Selected Table 34. TIM2 Control Bits CSP2 CSP1 CSP0 ...
Page 50
FUNCTIONAL DEVICE OPERATION LOGIC COMMANDS AND REGISTERS Table 36. LX2HS Control Bits Logic No. 0 Yes. Lx inputs sensed at sampling point. 1 Table 37. HSAUTO Control Bits Logic OFF. 0 ON, HS Cyclic, period defined in TIM2 subregister. 1 ...
Page 51
INTERRUPT REGISTER (INTR) Tables 40 through 42 contain the Interrupt Register information. The INTR register allows masking or enabling the interrupt source. A read operation identifies the interrupt source. register content are copies of the IOR, CAN, TIM, and LPC ...
Page 52
TYPICAL APPLICATIONS SBC POWER SUPPLY The 33742 is supplied from the battery line. A serial diode is necessary to protect the device against negative transient pulses and from reverse battery. This is illustrated in Figure 31. V PWR Rp R1 ...
Page 53
VOLTAGE REGULATOR The SBC contains two 5.0 V regulators regulator, fully integrated and protected, and a V2 regulator, which operates with an external ballast transistor. VDD REGULATOR The VDD regulator provides 5.0 V output, 2.0% accuracy with current ...
Page 54
TYPICAL APPLICATIONS VDD VDD SPI SPI (CS) (CS RST RST 350 ms 350 ms INT INT SBC in Normal request SBC in Normal request SBC in SBC in & reset modes & reset modes RESET RESET mode mode ...
Page 55
POWER-UP AND VDD GOING LOW WITH SLEEP MODE AS DEFAULT LOW POWER MODE IS SELECTED The first part of Figure 35 is identical to Figure 34. If VDD is pulled below the VDD under voltage reset (typ 4.6V), say by ...
Page 56
PACKAGING PACKAGE AND THERMAL CONSIDERATIONS PACKAGE AND THERMAL CONSIDERATIONS The 33742 SBC is a standard surface mount 28-pin SOIC wide body. In order to improve the thermal performances of the SOIC package, eight of the 28 pins are internally connected ...
Page 57
Analog Integrated Circuit Device Data Freescale Semiconductor DW SUFFIX EG SUFFIX (PB-FREE) 28-LEAD SOICW PLASTIC PACKAGE 98ASB42345B ISSUE G PACKAGING PACKAGING DIMENSIONS 33742 57 ...
Page 58
PACKAGING PACKAGING DIMENSIONS 33742 58 EP SUFFIX (PB-FREE) 48-LEAD QFN 98ARH99048A ISSUE F Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 59
Analog Integrated Circuit Device Data Freescale Semiconductor EP SUFFIX (PB-FREE) 48-LEAD QFN 98ARH99048A ISSUE F PACKAGING PACKAGING DIMENSIONS 33742 59 ...
Page 60
PACKAGING PACKAGING DIMENSIONS 33742 60 EP SUFFIX (PB-FREE) 48-LEAD QFN 98ARH99048A ISSUE F Analog Integrated Circuit Device Data Freescale Semiconductor ...
Page 61
... All electrical, application, and packaging information is provided in the data sheet. Packaging and Thermal Considerations The MC33742 is offered pin SOICW exposed pad, single die package. There is a single heat source (P), a single junction temperature (T ), and thermal resistance (R ). θ ...
Page 62
ADDITIONAL DOCUMENTATION THERMAL ADDENDUM (REV 2.0) RXD WDOG 1 28 TXD VDD 3 26 MOSI RST MISO 4 25 INT SCLK 5 24 GND GND 6 23 GND GND 7 22 GND GND 8 21 GND GND ...
Page 63
Figure 40. Device on Thermal Test Board R 100 10 1 0.1 1.00E-03 1.00E-02 Figure 41. Transient Thermal Resistance Step response, Device on Thermal Test Board Area A ...
Page 64
REVISION HISTORY REVISION DATE DESCRIPTION OF CHANGES • Converted to Freescale format 2/2006 3.0 • Implemented Revision History page • Added Thermal Addendum (Rev. 1.0) 6/2006 4.0 • Changed Data Sheet from “Advanced” to “Final” • Added MCZ33742EG/R2 and MCZ33742SEG/R2 ...
Page 65
... Freescale Semiconductor Literature Distribution Center P.O. Box 5405 Denver, Colorado 80217 1-800-441-2447 or 303-675-2140 Fax: 303-675-2150 LDCForFreescaleSemiconductor@hibbertgroup.com MC33742 Rev. 10.0 5/2007 RoHS-compliant and/or Pb-free versions of Freescale products have the functionality and electrical characteristics of their non-RoHS-compliant and/or non-Pb-free counterparts. For further information, see http://www.freescale.com Freescale sales representative. For information on Freescale’ ...