mc33742 Freescale Semiconductor, Inc, mc33742 Datasheet - Page 26

• Manufacturer Part Number: mc33742
• Description: Mc33742 System Basis Chip Sbc With Enhanced High-speed Can Transceiver
• Manufacturer: Freescale Semiconductor, Inc

APPLICATION WAKE-UP FROM THE 33742
from the SBC side. When a wake-up condition is detected by
the SBC (for example, CAN, wake-up input), the 33742
enters the Normal Request mode and generates an interrupt
pulse at the INT pin.
APPLICATION WAKE-UP FROM THE MCU
may come from the system MCU. In this case the MCU
selects the device the using a LOW-to-HIGH transition on the
33742 CS pin. Then the 33742S goes into Normal Request
mode and generates an interrupt pulse at the INT pin.
STOP MODE CURRENT MONITOR
(I
mode and generates an interrupt at the INT pin. The interrupt
is a non-maskable and the INTR register will have no flag set.
INTERRUPT GENERATION WHEN WAKE-UP
FROM STOP MODE
Normal Request mode before generating a 10 µs typical
pulse on the INT pin. These are non-maskable interrupts with
the wake-up event read through the SPI registers, the
CANWU bit in the CAN Register (CANR), or the LCTRx bit in
the Wake-Up Register (WUR). In case of wake-up from Stop
26
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
Notes
Programming
DDS-WU
38.
39.
40.
Debug
Debug
Debug
When the application is in Stop mode, it can be awakened
When the device is in the Stop mode, a wake-up event
If the VDD output current exceeds an internal set threshold
When the SBC wakes from Stop mode, it first enters the
Standby
Normal
Sleep
Flash
Stop
Stop
Mode entered via special sequence described under the heading
on page 30.
I
WDOG if enabled.
DD
(38)
(38)
(38)
), the SBC automatically enters the Normal Request
overcurrent always enabled.
HS:OFF or Cyclic Sense
HS: OFF or Cyclic
Same as Standby
Forced externally
Same as Normal
(Limited Current
Same as Stop
Capability),
VDD: OFF,
VDD: ON
V2: OFF,
V2: OFF,
L0 : L3, Cyclic Sense
I
DD
Forced Wake-Up,
CAN, SPI, L0 : L3,
Forced Wake-Up
Same as Stop
Cyclic Sense,
Overcurrent
CAN, SPI,
–
–
–
(39)
Active LOW if WDOG
or VDD undervoltage
undervoltage occurs
undervoltage occurs
undervoltage occurs
Active LOW if VDD
Active LOW if VDD
Active LOW if VDD
Normally HIGH.
Normally HIGH.
Normally HIGH.
Normally HIGH.
Not operating
Debug Mode: Hardware and Software Debug with the 33742
occurs
LOW
(40)
mode overcurrent situation or from forced wake-up, no bits
are set. After the INT pulse, the 33742 accepts SPI command
after a time delay (t
WATCHDOG SOFTWARE IN STOP MODE
provide a “system ok” response before the end of the 33742
watchdog time. Typically an MCU initiates the wake-up of the
33742 through the SPI wake-up (CS activation). The SBC will
awaken and jump into the Normal Request mode. The MCU
has to configure the 33742 to go to either Normal or Standby
mode. The MCU can then decide to return to the Stop mode.
period, the SBC activates the RST pin and jumps into the
Normal Request mode. The MCU can then be re-initialized.
STOP MODE ENTER COMMAND
rising edge of the CS. (Refer to the t
Dynamic Electrical Characteristics table on page 17.) Once
Stop mode is entered, the SBC can wake up from a VDD
regulator overcurrent detection state. In order to allow time
for the MCU to complete the last CPU instruction and enter
its low power mode, a deglitcher time of 40 µs typical is
implemented.
Stop mode.
If the SBC watchdog is enabled, the application must
If no MCU wake-up occurs within the watchdog time
Stop mode is entered at the end of the SPI message at the
Figure
11, page 27, depicts the operation of entering the
Same as Standby Not running
Same as Normal
(not maskable)
Signal 33742S
Same as Stop
I
Not operating
wake-up and
DD
Not Active
> I
DDS-WU
S-1STSPI
Analog Integrated Circuit Device Data
).
Not running if
Not operating
Not running
Not running
Not running
Running if
enabled.
disabled
Freescale Semiconductor
CS-STOP
Wake-up capability
Wake-up capability
Same as Standby
Same as Normal
Same as Stop
Not operating
data in the
Low power.
Low power.
if enabled
if enabled
beginning