peb20320 Infineon Technologies Corporation, peb20320 Datasheet - Page 40

• Manufacturer Part Number: peb20320
• Description: Multichannel Network Interface Controller For Hdlc
• Manufacturer: Infineon Technologies Corporation

User’s Manual
If the HOLD ACKNOWLEDGE is driven low while the MUNICH32 is performing a bus
cycle, the bus is released later than two clock periods after de-assertion of HOLD
ACKNOWLEDGE. The current bus cycle is finished with a bus cycle error. This action
should be followed by an ASP.RES as described in Chapter 4.2.1.
Figure 18
Read Cycle Timing Diagram (Intel mode)
[A27-A2]
[DP3-DP0], D(31:0)
A31-A2
READY
BE(3:0)
[PCHK]
BERR
SCLK
ADS
W/R
S1
READ
S2
S1
READ
40
S2
S
W
S
W
S1
Functional Description
BERR
S2
Tristate
PEB 20320
ITD03501
01.2000