hip6503 Intersil Corporation, hip6503 Datasheet - Page 11

• Manufacturer Part Number: hip6503
• Description: Multiple Linear Power Controller With Acpi Control Interface
• Manufacturer: Intersil Corporation

high-frequency decoupling capacitors should be placed as
close as possible to the load they are decoupling; the ones
decoupling the controller close to the controller pins, the
ones decoupling the load close to the load connector or the
load itself (if embedded). Even though bulk capacitance
(aluminum electrolytics or tantalum capacitors) placement is
not as critical as the high-frequency capacitor placement,
having these capacitors close to the load they serve is
preferable.
The critical small signal components include the soft-start
capacitor, C
R
of the control IC, and connect them to ground through a via
placed close to the ground pad. Minimize any leakage
current paths from these nodes, since the internal current
sources are only 10s of microamperes (10µA to 40µA).
A multi-layer printed circuit board is recommended. Figure
10 shows the connections of most of the components in the
converter. Note that the individual capacitors shown each
could represent numerous physical capacitors. Dedicate one
solid layer for a ground plane and make all critical
component ground connections through vias placed as close
to the component terminal as possible. Dedicate another
solid layer as a power plane and break this plane into
smaller islands of common voltage levels. Ideally, the power
SEL
C
C
C
V
HF4
BULK4
+12V
HF1
OUT1
+5V
. Locate these components close to the respective pins
Q3
V
C
FIGURE 10. PRINTED CIRCUIT BOARD ISLANDS
SB
IN
OUT3
HF3
Q2
C
BULK1
SS
C
KEY
, as well as the memory selection resistor,
C
BULK3
SS
VIA CONNECTION TO GROUND PLANE
ISLAND ON POWER PLANE LAYER
ISLAND ON CIRCUIT/POWER PLANE LAYER
C
12V
1V8SB
1V8IN
SS
3V3DLSB
3V3DL
VCLK
12V
3V3
HIP6503
11
GND
5VSB
5VDLSB
VSEN2
DRV2
5VDL
C
DLA
5VSB
5V
C
BULK5
Q1
C
IN
V
C
OUT2
BULK2
V
Q5
C
OUT5
+5V
+3.3V
HF5
C
IN
HF2
IN
Q4
HIP6503
plane should support both the input power and output power
nodes. Use copper filled polygons on the top and bottom
circuit layers to create power islands connecting the filtering
components (output capacitors) and the loads. Use the
remaining printed circuit layers for small signal wiring.
Component Selection Guidelines
Output Capacitors Selection
The output capacitors for all outputs should be selected to
allow the output voltage to meet the dynamic regulation
requirements of active state operation (S0, S1). The load
transient for the various microprocessor system’s
components may require high quality capacitors to supply
the high slew rate (di/dt) current demands. Thus, it is
recommended that the output capacitors be selected for
transient load regulation, paying attention to their parasitic
components (ESR, ESL).
Also, during the transition between active and sleep states,
there is a short interval of time during which none of the
power pass elements are conducting - during this time the
output capacitors have to supply all the output current. The
output voltage drop during this brief period of time can be
easily approximated with the following formula:
∆V
ESR
I
C
t
The output voltage drop is heavily dependent on the ESR
(equivalent series resistance) of the output capacitor bank,
the choice of capacitors should be such as to maintain the
output voltage above the lowest allowable regulation level.
V
The output capacitor for the V
loop stability. Figure 11 outlines a capacitance vs. equivalent
series resistance envelope. For stable operation and
optimized performance, select a C
combination of capacitors with characteristics within the
shown envelope.
∆
OUT
t
V
OUT
CLK
- active-to-sleep or sleep-to-active transition time (10µs typ.)
OUT
OUT
OUT
- output current during transition
- output capacitor bank capacitance
(V
=
- output voltage drop
- output capacitor bank ESR
OUT4
I
OUT
×
) Output Capacitors Selection



ESR
OUT
+
--------------- -
C
CLK
OUT
t
t



OUT4
linear regulator provides
, where
capacitor or
July 21, 2005
FN4882.5