hip6503 Intersil Corporation, hip6503 Datasheet - Page 12

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hip6503

Manufacturer Part Number
hip6503
Description
Multiple Linear Power Controller With Acpi Control Interface
Manufacturer
Intersil Corporation
Datasheet

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Input Capacitors Selection
The input capacitors for an HIP6503 application have to
have a sufficiently low ESR as to not allow the input voltage
to dip excessively when energy is transferred to the output
capacitors. If the ATX supply does not meet the
specifications, certain imbalances between the ATX’s
outputs and the HIP6503’s regulation levels could have as a
result a brisk transfer of energy from the input capacitors to
the supplied outputs. At the transition between active and
sleep states, this phenomena could result in the 5VSB
voltage drooping excessively and affecting the output
regulation. The solution to a potential problem such as this is
using larger input capacitors with a lower total combined
ESR.
Transistor Selection/Considerations
The HIP6503 usually requires one P-Channel (or bipolar
PNP), two N-Channel MOSFETs and two bipolar NPN
transistors.
One important criteria for selection of transistors for all the
linear regulators/switching elements is package selection for
efficient removal of heat. The power dissipated in a linear
regulator/switching element is
Select a package and heatsink that maintains the junction
temperature below the rating with the maximum expected
ambient temperature.
Q1
The active element on the 2.5V
bipolar NPN capable of conducting the maximum active
memory current and exhibit a current gain (h
40 at this current and 0.7V V
P
LINEAR
0.01
0.1
10
1
10
=
FIGURE 11. C
I
O
×
(
V
IN
V
OUT4
OUT
CAPACITANCE (µF)
)
CE
12
OUTPUT CAPACITOR
MEM
100
.
output has to be a
fe
) of minimum
1000
HIP6503
Q2
The NPN transistor used as sleep state pass element (Q2)
on the 3.3V
of 100 at 1.5V V
operating temperature range.
Q3, 4, Q2 in 3.3V
These N-Channel MOSFETs are used to switch the 3.3V
and 5V inputs provided by the ATX supply into the 3.3V
3.3V
S1) state. The main criteria for the selection of these
transistors is output voltage budgeting. The maximum
r
expressed with the following equation:
V
V
I
The gate bias available for these MOSFETs is of the order of
8V.
Q5
If a P-Channel MOSFET is used to switch the 5VSB output
of the ATX supply into the 5V
states (as dictated by EN5VDL status), then the selection
criteria of this device is proper voltage budgeting. The
maximum r
4.5V of V
If a PNP device is chosen to perform this function, it has to
have a low saturation voltage while providing the maximum
sleep current and have a current gain sufficiently high to be
saturated using the minimum drive current (typically 20mA).
r
OUTmax
DS(ON)
DS ON
INmin
OUTmin
(
DUAL
)max
- minimum input voltage
allowed at highest junction temperature can be
GS
- maximum output current
- minimum output voltage allowed
/3.3V
DS(ON)
DUAL
, so a logic level MOSFET needs to be selected.
=
V
-------------------------------------------------- -
SB
CE
INmin
output has to have a minimum current gain
, and 5V
, however, has to be achieved with only
I
and 500mA I
MEM
OUTmax
V
OUTmin
configuration
DUAL
DUAL
CE
outputs, while in active (S0,
, where
output during S3 and S5
throughout the in-circuit
July 21, 2005
FN4882.5
MEM
,

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