tmp88f846ug TOSHIBA Semiconductor CORPORATION, tmp88f846ug Datasheet - Page 139

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tmp88f846ug

Manufacturer Part Number
tmp88f846ug
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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Waveform Synthesis Circuit Registers [Addresses (PMD1)]
(01FBEH)
(01FAFH)
(01FAEH)
MDCRB
MDCRA
CMPW
DTR
CMPU
CMPV
Note: When changing setting, keep the PWMEN bit reset to “0” (disable wave form synthesis function).
Note: When changing setting, keep the MDCRA<PWMEN> bit reset to "0" (disable wave form synthesis function).
5 to 0
1, 0
3, 2
HLFINT
7
6
5
4
1
0
7
7
7
Set PWM pulse width
PWMCK
HLFINT
DTYMD
POLH
POLL
PINT
PWMMD
PWMEN
DTR
DTYMD
6
6
6
PWM counterSelect clock
POLH
Select half-period interrupt
DUTY mode
Upper-phase port polarity
Lower-phase port polarity
Select PWM interrupt (trigger)
PWM mode
Enable/disable waveform syn-
thesis function
Dead time
D5
5
5
5
POLL
D4
4
4
4
This comparison register determines the pulse widths output in the respective UVW
phases. This register is dual-buffered, and the pulse widths are determined by comparing
the buffer and PWM counter.
D3
3
3
3
PINT
Page 129
00: fc/2 [Hz] (100 ns at 20 MHz)
01: fc/2
10: fc/2
11: fc/2
0: Interrupt as specified in PINT
1: Interrupt every half period when PINT = 00
0: U phase in common
1: Three phases independent
0: Active low
1: Active high
0: Active low
1: Active high
00: Interrupt every period
01: Interrupt once every 2 periods
10: Interrupt once every 4 periods
11: Interrupt once every 8 periods
0: PWM mode0 (Edge: Sawtooth wave)
1: PWM mode1 (Center: Triangular wave)
0: Disable
1: Enable (Waveform output)
2
3
D2
2
/fc × 6 bit (maximum 25.2 µs at 20 MHz)
2
2
4
2
3
PWMMD
(800 ns at 20 MHz)
(200 ns at 20 MHz)
(400 ns at 20 MHz)
D1
1
1
1
PWMCK
PWMEN
D0
0
0
0
(Initial value: **** **00)
(Initial value: 0000 0000)
(Initial value: **00 0000)
TMP88F846UG
R/W
R/W
R/W

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