tmp88f846ug TOSHIBA Semiconductor CORPORATION, tmp88f846ug Datasheet - Page 57

• Manufacturer Part Number: tmp88f846ug
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

5.5 Port P6 (P67 to P60)
P6 Port Input/Output Registers
(01F8CH)
(00006H)
P6DR
P6CR
and output modes using the P6 port input/output control register (P6CR), P6 port output latch (P6DR), and ADC-
CRA<AINDS>. When reset, the P6CR Register and the P6DR output latch are initialized to 0 while ADC-
CRA<AINDS> is set to 1, so that P67 to P60 have their inputs fixed low ( = 0). When using the P6 port as an input
port, set the corresponding bits for input mode (P6CR = 0, P6DR = 1). The reason why the output latch = 1 is
because it is necessary to prevent current from flowing into the shared data input circuit. When using the port as an
output port, set the P6CR Register's corresponding bits to 1. When using the port for analog input, set the corre-
sponding bits for analog input (P6CR = 0, P6DR = 0). Then set ADCCRA<AINDS> = 0, and AD conversion will
start.
AD conversion are selected using ADCCRA<SAIN>.
instructions on these ports during AD conversion. This is necessary to maintain the accuracy of AD conversion.
Also, do not apply rapidly changing signals to ports adjacent to analog input during AD conversion.
ata output (P6)
Port P6 is an 8-bit input/output port shared with AD converter analog input. This port is switched between input
The ports used for analog input must have their output latches set to 0 beforehand. The actual input channels for
Although the bits of P6 port not used for analog input can be used as input/output ports, do not execute output
If an input instruction is executed while the P6DR output latch is cleared to 0, data “0” is read in from said bits.
Note 1: The pins used for analog input cannot be set for output mode (P6CR = 1) because they become shorted with external
Note 2: When a read instruction is executed on bits of this port which are set for analog input mode, data "0" is read in.
Note 3: For DBOUT1 output, set the P6DR (P67) output latch to 1.
Note 4: When using this port in input mode (including analog input), do not use bit manipulating or other read-modify-write instruc-
ata input (P6)
Analog input
P6CRi input
DBOUT1
AIN S
P6CRi
signals.
tions. When a read instruction is executed on the bits of this port that are set for input, the contents of the pins are read in,
so that if a read-modify-write instruction is executed, their output latches may be rewritten, making the pins unable to
STOP
AIN7
SAIN
P67
P6CR
7
7
AIN6
P66
6
6
P6 port input/output control
(Specify bitwise)
AIN5
P65
Q
Q
5
5
AIN4
P64
4
4
Figure 5-6 Port P6
AIN3
P63
3
3
0
1
Page 47
Inputs fixed to 0
AINDS = 1 (when not using AD)
AIN2
P62
P6DR = “0”
2
2
AIN1
P61
1
1
Note 1: i = 7
Note 2: STOP exists in SYSCR1 register bit 7
Note 3: SAIN selects A input channels.
P6DR = “1”
Input mode
AIN0
P60
0
0
Output mode
P6i
to
Read/Write
(Initial value: 0000 0000)
(Initial value: 0000 0000)
0
mode (Note2)
Analog input
P6DR = “0”
AINDS = 0 (when using AD)
P6DR = “1”
Input mode
TMP88F846UG
R/W