tmp88f846ug TOSHIBA Semiconductor CORPORATION, tmp88f846ug Datasheet - Page 63
tmp88f846ug
Manufacturer Part Number
tmp88f846ug
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP88F846UG.pdf
(244 pages)
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7.3 Function
7.3.1 Enabling/Disabling Voltage Detection Operation
7.3.2 Selecting the Voltage Detect Operating Mode
7.3.3 Detection voltage level section
enable or disable voltage detect operation and the action to be taken when the supply voltage (VDD) falls below the
threshold voltage (VD1LVL) can be programmed by software.
Voltage detection 1 reset signal
The voltage detecting circuit allows threshold voltage level to be specified. The threshold voltage, whether to
Immediately after release of a power-on reset,VDCR2<VD1EN>, is cleared to 0.
INTVLTD interrupt or a voltage detect x reset signal to be generated.
and voltage detect operation is enabled (VDCR2<VD1EN>=1), an INTVLTD interrupt is generated if the sup-
ply voltage (VDD) falls below the threshold voltage (VD1LVL).
voltage detect operation is enabled (VDCR2<VD1EN>=1), a voltage detect x reset signal is generated if the
supply voltage (VDD) falls below the threshold voltage (VD1LVL).
reset input signal remains asserted while the supply voltage (VDD) is below the threshold voltage (VD1LVL).
Detection voltage level
Setting the VDCR2<VD1EN> bit to 1 enables voltage detect operation and clearing this bit to 0 disables it.
Note: Setting VDCR2<VD1EN> to 1 while the supply voltage is below the threshold voltage (VDD < VD1LVL) immediately causes an
When the voltage detect operation mode is set to generating an interrupt request (VDCR2<VD1MOD>=0)
When the voltage detect operation mode is set to generating a reset signal (VDCR2<VD1MOD>=1) and
The VDCR1 and VDCR2 are only initialized by a power-on reset or an external reset input. Therefore, the
Note) The "reset input signal" mentioned above is the reset input shown in Figure 2-15 in "Reset Circuit".
The threshold voltage level is selected by programming the VDCR1<VD1LVL> bits.
VDCR2<VD1EN>
VDD level
INTVLTD
Figure 7-2 interrupt request signal and reset signal
Page 53
TMP88F846UG
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