lf3304 LOGIC Devices Incorporated, lf3304 Datasheet - Page 11

• Manufacturer Part Number: lf3304
• Description: Dual Line Buffer/fifo
• Manufacturer: LOGIC Devices Incorporated

DEVICES INCORPORATED
1. Maximum Ratings indicate stress
specifications only. Functional oper-
ation of these products at values
beyond those indicated in the Operat-
ing Conditions table is not implied.
Exposure to maximum rating condi-
tions for extended periods may affect
reliability.
2. The products described by this spec-
ification include internal circuitry
designed to protect the chip from
damaging substrate injection currents
and accumulations of static charge.
Nevertheless, conventional precau-
tions should be observed during stor-
age, handling, and use of these circuits
in order to avoid exposure to excessive
electrical stress values.
3. This device provides hard clamping
of transient undershoot. Input levels
below ground will be clamped begin-
ning at –0.6 V. The device can with-
stand indefinite operation with inputs
or outputs in the range of –0.5 V to
+5.5 V. Device operation will not be
adversely affected, however, input
current levels will be well in excess
of 100 mA.
4. Actual test conditions may vary
from those designated but operation is
guaranteed as specified.
5. Supply current for a given applica-
tion can be accurately approximated
by:
where
6. Tested with outputs changing every
cycle and no load, at a 40 MHz clock
rate.
7. Tested with all inputs within 0.1 V of
V
8. These parameters are guaranteed
NOTES
N = total number of device outputs
C = capacitive load per output
V = supply voltage
F = clock frequency
CC
or Ground, no load.
NCV F
4
2
but not 100% tested.
9. AC specifications are tested with
input transition times less than 3 ns,
output reference levels of 1.5 V (except
t
0 to 3.0 V. Output loading may be a
resistive divider which provides for
specified I
voltage of V
respectively. Alternatively, a diode
bridge with upper and lower current
sources of I
and a balancing voltage of 1.5 V may
be used. Parasitic capacitance is 30 pF
minimum, and may be distributed.
This device has high-speed outputs
capable of large instantaneous current
pulses and fast turn-on/turn-off times.
As a result, care must be exercised in
the testing of this device. The following
measures are recommended:
a. A 0.1 µF ceramic capacitor should
be installed between V
leads as close to the Device Under Test
(DUT) as possible. Similar capacitors
should be installed between device
V
ground and tester common.
b. Ground and V
must be brought directly to the DUT
socket or contactor fingers.
c. Input voltages on a test fixture
should be adjusted to compensate for
inductive ground and V
maintain required DUT input levels
relative to the DUT ground pin.
10. Each parameter is shown as a
minimum or maximum value. Input
requirements are specified from the
point of view of the external system
driving the chip.
example, is specified as a minimum
since the external system must supply
at least that much time to meet the
worst-case requirements of all parts.
Responses from the internal circuitry
are specified from the point of view of
the device. Output delay, for example,
is specified as a maximum since worst-
DIS
CC
test), and input levels of nominally
and the tester common, and device
OH
OH
OH
and I
and I
min and V
11
CC
OL
Setup time, for
OL
CC
supply planes
at an output
respectively,
and Ground
CC
noise to
OL
max
case operation of any device always
provides data within that time.
11. For the t
measured to the 1.5 V crossing point
with datasheet loads.
t
to the ±200mV level from the mea-
sured steady-state output voltage with
±10mA loads. The balancing voltage,
V
tests, and set at 0 V for Z-to-1 and
1-to-Z tests.
12. These parameters are only tested at
the high temperature extreme, which is
the worst case for leakage current.
F
DIS
DUT
Z
Z
TH
F
IGURE
Video Imaging Products
OE
IGURE
, is set at 3.0 V for Z-to-0 and 0-to-Z
0
1
test, the transition is measured
V
V
OL
OH
Dual Line Buffer/FIFO
*
*
Measured V
Measured V
A. O
C
1.5 V
t
B. T
L
ENA
ENA
S1
UTPUT
1.5 V
1.5 V
HRESHOLD
OL
OH
with I
with I
test, the transition is
OH
OH
V
V
OH
= –10mA and I
OL
= –10mA and I
1.5 V
L
*
*
OADING
9/28/2005–LDS.3304-I
I
OH
0.2 V
0.2 V
t
DIS
L
LF3304
EVELS
OL
OL
For
= 10mA
= 10mA
V
TH
C
3.0V Vth
0
1
IRCUIT
0V Vth
the
I
Z
Z
OL