lf3310 LOGIC Devices Incorporated, lf3310 Datasheet

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lf3310

Manufacturer Part Number
lf3310
Description
Horizontal / Vertical Digital Image Filter
Manufacturer
LOGIC Devices Incorporated
Datasheet

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Part Number:
lf3310QC12
Manufacturer:
LOGIC
Quantity:
20 000
DEVICES INCORPORATED
FEATURES
LF3310 B
DEVICES INCORPORATED
83 MHz Data Rate
12-bit Data and Coefficients
On-board Memory for 256 Horizon-
tal and Vertical Coefficient Sets
LF Interface
ficient Sets to be Updated Within
Vertical Blanking
Selectable 12-bit Data Output with
User-Defined Rounding and Limit-
ing
Seven 3K x 12-bit, Programmable
Two-Mode Line Buffers
16 Horizontal Filter Taps
8 Vertical Filter Taps
Two Operating Modes: Dimension-
ally Separate and Orthogonal
Supports Interleaved Data Streams
Horizontal Filter Supports Deci-
mation up to 16:1 for Increasing
Number of Filter Taps
3.3 Volt Power Supply
5 Volt Tolerant I/O
144 Lead PQFP
LOCK
TM
Allows All 512 Coef-
DIN
D
11-0
IAGRAM
12
3K LINE BUFFER
3K LINE BUFFER
3K LINE BUFFER
3K LINE BUFFER
3K LINE BUFFER
3K LINE BUFFER
3K LINE BUFFER
The LF3310 is a two-dimensional digital
image filter capable of filtering data at
real-time video rates. The device con-
tains both a horizontal and a vertical
filter which may be cascaded or used
concurrently for two-dimensional filter-
ing. The input, coefficient, and output
data are all 12-bits and in two’s comple-
ment format.
The horizontal filter is designed to take
advantage of symmetric coefficient sets.
When symmetric coefficient sets are
used, the horizontal filter can be config-
ured as a 16-tap FIR filter. When asym-
metric coefficient sets are used, it can be
configured as an 8-tap FIR filter. The
vertical filter is an 8-tap FIR filter with
all required line buffers contained on-
chip. The line buffers can store video
lines with lengths from 4 to 3076 pixels.
Horizontal filter Interleave/
Decimation Registers (I/D Registers)
and the vertical filter line buffers
allow interleaved data to be fed
directly into the device and filtered
DESCRIPTION
Horizontal / Vertical Digital Image Filter
1
Horizontal / Vertical Digital Image Filter
256 COEFFICIENT SET STORAGE
16-TAP HORIZONTAL FILTER
DOUT
without separating the data into indi-
vidual data streams. The horizontal
filter can handle a maximum of six-
teen data sets interleaved together.
The vertical filter can handle inter-
leaved video lines which contain
3076 or less data values. The I/D
Registers and horizontal accumulator
facilitate using decimation to increase
the number of filter taps in the hori-
zontal filter. Decimation of up to 16:1
is supported.
The device has on-chip storage for 256
horizontal coefficient sets and 256 ver-
tical coefficient sets. Each filter’s coef-
ficients are loaded independently of
each other allowing one filter’s coef-
ficients to be updated without affect-
ing the other filter’s coefficients. In
addition, a horizontal or vertical coef-
ficient set can be updated indepen-
dently from the other coefficient sets
in the same filter.
12
Video Imaging Products
11-0
LF3310
9/14/2005-LDS.3310-I
LF3310

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lf3310 Summary of contents

Page 1

... LINE BUFFER 3K LINE BUFFER Horizontal / Vertical Digital Image Filter Horizontal / Vertical Digital Image Filter DESCRIPTION The LF3310 is a two-dimensional digital image filter capable of filtering data at real-time video rates. The device con- tains both a horizontal and a vertical filter which may be cascaded or used concurrently for two-dimensional filter- ing ...

Page 2

... DEVICES INCORPORATED F 1. LF3310 F IGURE UNCTIONAL DATA REVERSAL 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 1-16 Horizontal / Vertical Digital Image Filter B D LOCK IAGRAM 2 LF3310 Video Imaging Products 9/14/2005-LDS.3310-I ...

Page 3

... LOW transition of HLD is required in order for the input circuitry to func- tion properly. Therefore, HLD must be set HIGH immediately after power up to ensure proper operation of the input circuitry (see the LF Interface section for a full discussion). Video Imaging Products LF3310 ...

Page 4

... VSHEN controls and the line buffers on the rising edge of CLK. When VSHEN is HIGH, data is not loaded ) and into or shifted through the registers VSHEN controls and the line buffers, and their contents will not be changed. VSHEN is latched on the rising edge of CLK. Video Imaging Products 9/14/2005-LDS.3310-I LF3310 ...

Page 5

... Orthogonal In Orthogonal Mode, the horizontal and vertical filters are used concur- rently to implement an orthogonal kernel on the input data (see Figure 6). The HV Filter can handle kernel Video Imaging Products LF3310 11-0 is fed 11-0 9/14/2005-LDS.3310-I ...

Page 6

... For example, if two data sets are interleaved together, the I/D Reg- isters should be set to a length of two. Bits 1 through 4 of Configuration Register 1 determine the I/D Register length. Video Imaging Products LF3310 9/14/2005-LDS.3310-I ...

Page 7

... I/D Register in the forward data path is fed into the first I/D Register in the reverse data path (see Figure 9). When the filter is configured for an odd number of taps, the data which will appear at the output of the last Video Imaging Products 9/14/2005-LDS.3310-I LF3310 2 1 COEF 7 2 COEF 6 ...

Page 8

... LIMIT VERTICAL RSL 12 DATA OUT 8 LF3310 TXFR in order to switch LIFOs. If dec- imating by N, TXFR should go low once every N clock cycles. When data reversal is disabled, the circuitry func- tions like an I/D Register. When feed- ing interleaved data through the filter, data reversal should be disabled. Bit 6 of Configuration Register 1 enables or disables data reversal ...

Page 9

... LF Interface section. TM Horizontal Select The word width of the horizontal 9 LF3310 filter output is 32-bits. However, only 12-bits may be sent to the filter output. The horizontal filter select circuitry determines which 12-bits are passed (see Table 1). The horizontal select registers control the horizontal select circuitry ...

Page 10

... Vertical Limit Enable 1 Horizontal Limit Enable 11-2 Reserved 10 LF3310 of data sets it can handle is deter- mined by the number of data values contained in a video line. If the inter- leaved video line has 3076 data values or less, the vertical filter can handle it no matter how many data sets are interleaved together ...

Page 11

... VRSL determines which verti- 3-0 cal limit register is used during the limit operation. A value VRSL selects vertical limit register 3 value of 1 selects vertical limit 11 LF3310 T 12 ABLE RT OUND EGISTERS REGISTER ADDRESS (HEX) ...

Page 12

... HLD is used to enable and disable the Horizontal LF Interface goes LOW, the Horizontal LF Inter- face is enabled for data input. The TM first value fed into the interface on HCF is an address which deter- 11-0 mines what the interface is going to Video Imaging Products LF3310 W3 works When HLD TM 9/14/2005-LDS.3310-I ...

Page 13

... Configura- . tion Register 4. Table 17 shows an TM example of loading data into a round register. Data value 7683F4A2H is written into horizontal round register VPAUSE I AND MPLEMENTATION COEF 7 HPAUSE VPAUSE AND SELECT REGISTER DATA 2 1 Video Imaging Products 9/14/2005-LDS.3310-I LF3310 W1 W2 ...

Page 14

... H/VCF H/VCF H/VCF H/VCF Video Imaging Products LF3310 H/VCF 9/14/2005-LDS.3310-I ...

Page 15

... H/VCF H/VCF H/VCF H/VCF H/VCF Video Imaging Products LF3310 must be dis- H/VCF H/VCF 9/14/2005-LDS.3310-I ...

Page 16

... H/VCF H/VCF H/VCF H/VCF H/VCF H/VCF H/VCF H/VCF H/VCF H/VCF Video Imaging Products LF3310 H/VCF H/VCF 9/14/2005-LDS.3310-I ...

Page 17

... CC OL (Note 3) Ground ≤ V ≤ V (Note 12 Ground ≤ V ≤ V (Note 12) OUT CC (Notes 5, 6) (Note 25° MHz 25° MHz A 17 LF3310 Voltage Supply 3.00V ≤ V ≤ 3.60V CC 3.00V ≤ V ≤ 3.60V CC Min Typ Max Unit 2.4 V 0.4 V 2.0 5.5 V 0.0 0.8 V ±10 µ ...

Page 18

... PWL t PWH DIN t N+1 CYC HCA/VCA N+1 t ENA t DIS HIGH IMPEDANCE 18 LF3310– Min Max Min Max Min 1.5 1.5 1 OUTPUT - OUTPUT N 1 Video Imaging Products 9/14/2005-LDS.3310-I LF3310 12 Max ...

Page 19

... Notes 9, 10 (ns Min Max 1.5 TM NTERFACE PWL LF3310– Min Max Min Max 1.5 1 Video Imaging Products LF3310 12 Min Max 5 1.5 4 1 9/14/2005-LDS.3310-I ...

Page 20

... Responses from the internal circuitry are specified from the point of view of the device. Output delay, for example, is specified as a maximum since worst- 20 LF3310 case operation of any device always provides data within that time. 11. For the t test, the transition is ENA measured to the 1 ...

Page 21

... LF3310QC12G (GREEN) LOGIC Devices Incorporated reserves the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete ...

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