xr16c872iq Exar Corporation, xr16c872iq Datasheet - Page 42

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xr16c872iq

Manufacturer Part Number
xr16c872iq
Description
Dual Uart With 1284 Parallel Port And Plug-and-play Controller
Manufacturer
Exar Corporation
Datasheet
XR16C872
“NIBBLE MODE” SIGNAL DESCRIPTIONS
NIBBLE Mode Data Transfer Cycle
1. Host signals ability to take data by asserting HostBusy low.
2. Peripheral responds by placing first nibble on status lines.
3. Peripheral signals valid nibble by asserting PtrClk low.
4. Host sets HostBusy high to indicate that it has received the nibble and is not ready for another nibble.
5. Peripheral sets PtrClk high to acknowledge host.
Signal
name
STROBE#
AUTOFD#
SELCTIN#
INIT#
ACK#
BUSY
PE
SELECT
ERR#
PD0-PD7
Rev. 1.00
Signal
Type
O
O
O
O
O
I
I
I
I
I
Nibble mode
AckDataReq
1284Active
DataAvail#
STROBE#
HostBusy
PtrBusy
Name
PtrClk
INIT#
Xflag
DISCONTINUED
Description
Not used for reverse data transfer.
Host nibble mode handshake signal. Set low to indicate host is
ready for nibble. Set high to indicate nibble has been received.
Set high when host is in a 1284 transfer mode.
Not used for reverse data transfer.
Set low to indicate valid nibble data, set high in response to
“HostBusy” going high.
Used for Data Bit-3, then Bit-7.
Used for Data Bit-2, then Bit-6.
Used for Data Bit-1, then Bit-5.
Used for Data Bit-0, then Bit-4.
Not used.
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