sc16c2552b NXP Semiconductors, sc16c2552b Datasheet - Page 19

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sc16c2552b

Manufacturer Part Number
sc16c2552b
Description
Sc16c2552b 5 V, 3.3 V And 2.5 V Dual Uart, 5 Mbit/s Max. , With 16-byte Fifos
Manufacturer
NXP Semiconductors
Datasheet

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Product data
7.6 Modem Control Register (MCR)
This register controls the interface with the modem or a peripheral device.
Table 16:
Bit
7-5
4
3
2
1
0
Symbol
MCR[7-5]
MCR[4]
MCR[3]
MCR[2]
MCR[1]
MCR[0]
Modem Control Register bits description
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs
Rev. 02 — 13 December 2004
Description
Not used; initialized to a logic 0.
Loop-back. Enable the local loop-back mode (diagnostics). In this
mode the transmitter output TX and the receiver input RX, CTS, DSR,
CD, and RI are disconnected from the SC16C2552B I/O pins.
Internally the modem data and control pins are connected into a
loop-back data configuration (see
and transmitter interrupts remain fully operational. The Modem
Control Interrupts are also operational, but the interrupts’ sources are
switched to the lower four bits of the Modem Control. Interrupts
continue to be controlled by the IER register.
OP2. Used to control the modem CD signal in the loop-back mode.
OP1. This bit is used in the Loop-back mode only. In the loop-back
mode, this bit is used to write the state of the modem RI interface
signal.
RTS
DTR
Logic 0 = Disable loop-back mode (normal default condition).
Logic 1 = Enable local loop-back mode (diagnostics).
Logic 0 = Sets OP2 to a logic 1 (normal default condition). In the
loop-back mode, sets CD internally to a logic 1.
Logic 1 = Sets OP2 to a logic 0. In the loop-back mode, sets CD
internally to a logic 0.
Logic 0 = Force RTS output to a logic 1 (normal default condition).
Logic 1 = Force RTS output to a logic 0.
Logic 0 = Force DTR output to a logic 1 (normal default condition).
Logic 1 = Force DTR output to a logic 0.
Figure
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
SC16C2552B
4). In this mode, the receiver
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