ht82a523r Holtek Semiconductor Inc., ht82a523r Datasheet
ht82a523r
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ht82a523r Summary of contents
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... General Description This device is an 8-bit high performance RISC-like microcontroller designed for USB product applications particularly suitable for use in products such as USB Rev. 1.30 HT82A523R with SPI 8-Bit OTP MCU 2 sets of SIO (synchronous serial I/O) function Supports Interrupt, Control, Bulk transfer USB 2.0 full speed function compatible ...
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... Block Diagram Rev. 1.30 2 HT82A523R May 13, 2008 ...
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... The SDOB is pin-shared with PC7. SDOB is serial interface serial output. Wake up options: PC0~PC7(PC0~PC7 support falling edge wake-up) Bidirectional I/O lines. Software instructions determine the CMOS output or Schmitt trigger input with pull-high resistor (determined by pull-high options: nibble option). Wake-up options: PD0~PD7(PD0~PD7 support falling edge wake-up) 3 HT82A523R May 13, 2008 ...
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... UDP is USBD+ line USB function is controlled by software control register. UDN is USBD- line USB function is controlled by software control register. +6.0V Storage Temperature ............................ 125 C SS +0.3V Operating Temperature........................... HT82A523R May 13, 2008 ...
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... 0.33V 2 OH DDIO V =0.33V 20 DDIO 2 =5mA 3.0 V33O Test Conditions Min. V Conditions DD 5V 400 Power-up, reset or wake-up from HALT 1 5 HT82A523R Ta=25 C Typ. Max. Unit 5.5 V 5 300 500 0.3V V DDIO V V DDIO 0. ...
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... Program Counter S10 Program Counter S11~S0: Stack register bits @7~@0: PCL bits 6 HT82A523R * ...
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... The instruction TABRDL [m] , where the table lo- cations is defined by registers TBLP (07H) in the last page (0F00H~0FFFH). Table Location * Table Location P11~P8: Current program counter bits 7 HT82A523R * May 13, 2008 ...
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... If the stack is full and a CALL is subsequently executed, stack overflow occurs and the first entry will be lost (only the most recent 6 return addresses are stored). Rev. 1.30 Data Memory - RAM The data memory (RAM) is designed with 235 8 bits, RAM Mapping 8 HT82A523R May 13, 2008 ...
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... If the contents of the status is important, and if the subroutine is likely to corrupt the status register, the programmer should take precautions and save it properly. Function Status (0AH) Register 9 HT82A523R May 13, 2008 ...
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... INTC1) will be set. The access of the corresponding USB FIFO from PC The USB suspend signal from the PC The USB resume signal from the PC USB Reset signal Function INTC0 (0BH) Register Function INTC1 (1EH) Register 10 HT82A523R May 13, 2008 ...
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... When the HT82A523R receives a USB Suspend signal from the Host PC, the suspend line (bit0 of the USC) of the HT82A523R is set and a USB interrupt is also triggered. Also when the HT82A523R receives a Resume signal from the Host PC, the resume line (bit3 of the USC) of the HT82A523R is set and a USB interrupt is triggered ...
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... Most registers are reset to the initial condi- tion when the reset conditions are met. Examining the PDF and TO flags, the program can distinguish between different chip resets . 12 HT82A523R (system clock SYS May 13, 2008 ...
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... HT82A523R 000H Disable Cleared Clear. After master reset, WDT begins counting Off Input mode Points to the top of the stack USB Reset USB Reset (Normal) ...
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... HT82A523R USB Reset USB Reset (Normal) (HALT) 00-0 1000 00-0 1000 uuuu uuuu uuuu uuuu uuuu uuuu uuuu uuuu 00-0 1--- 00-0 1--- ...
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... In other words, only 1-cycle measurement can be made until the T0ON/T1ON is set. The cycle measurement will re-function as long as it re- ceives further transient pulse. In this operation mode, Timer/Event Counter 0 Timer/Event Counter 1 15 HT82A523R May 13, 2008 ...
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... After this procedure, the timer/event function can be operated normally. Function TMR0C (0EH) Register Function TMR1C (11H) Register 16 HT82A523R May 13, 2008 ...
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... All the I/O ports have the capability of waking-up the device recommended that unused or not bonded out I/O lines should be set as output pins by software instruction to avoid consuming power under input floating state. Function CLK (1CH) Register Input/Output Ports 17 HT82A523R May 13, 2008 ...
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... Operating Mode description: /4 SIO Master transmitter: clock sending and data I/O started /16 SIO by writing SBDR Master clock sending started by writing SBDR Slave transmitter: data I/O started by clock received Slave receiver: data I/O started by clock received 18 HT82A523R write data to TXRX buffer read from SBDR only May 13, 2008 ...
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... SPI interface which is pin-shared with port E.): The SYNC signal is used to synchronize the SDBR when both the HT82A523R is working under slave mode and PSYNC option is enabled. Otherwise, if the HT82A523R is working under master mode, the PSYNC option is ignored and the SYNC signal is not used to synchronize the SDBR ...
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... Rev. 1.30 20 HT82A523R May 13, 2008 ...
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... The device with remote wake-up function can wake-up the USB Host by sending a wake-up pulse through RMWK (bit 1 of the USC). Once the USB Host receive the wake-up signal from the HT82A523R, it will send a Resume signal to the device. The timing is as follow: USB Interface The HT82A523R has 4 Endpoints (EP0~EP3) ...
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... EEP0I R/W Control the endpoint 0 interrupt (1=enabled; 0=disable). 5 EEP1I R/W Control the endpoint 1 interrupt (1=enabled; 0=disable). 6 EEP2I R/W Control the endpoint 2 interrupt (1=enabled; 0=disable). 7 EEP3I R/W Control the endpoint 3 interrupt (1=enabled; 0=disable). Rev. 1.30 Function USC (20H) Definitions Function USR (21H) Definitions 22 HT82A523R May 13, 2008 ...
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... Label R/W STL0~ Set by users when the related USB endpoints are stalled. They are cleared by USB 0~3 R/W STL3 reset and Setup Token event 4~7 Undefined bit, read as 0 Rev. 1.30 Function UCC (22H) Definitions Function AWR (23H) Definitions Function STALL (24H) Definitions 23 HT82A523R May 13, 2008 ...
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... To tell that the desired FIFO is ready to work. 6 READY R (1=Ready to work; 0=Non ready to work) To tell that host sent a 0-sized packet to MCU. This bit must be cleared by read action 7 LEN0 R/W to corresponding FIFO. (1=Host sent a 0-sized packet) Rev. 1.30 Function SIES (25H) Definitions Function MISC (26H) Definitions 24 HT82A523R May 13, 2008 ...
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... Read or Write FIFO Table Function Function 25 HT82A523R May 13, 2008 ...
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... The purpose of this option is to enable the endpoint that will be used, and disable the endpoint that will not be used (USB chapter 8 will test this function). Rev. 1.30 Option (00 (01 (10 HT82A523R (11) (default May 13, 2008 ...
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... Timing Diagram Rev. 1.30 27 HT82A523R May 13, 2008 ...
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... Note: and remains within a valid operating voltage range before the RES line is brought high. X1 can be a 6MHz or 12MHz crystal located as close to the OSC1 and OSC2 pins as possible The 22pF capacitors are only applied if ceramic resonators are used Rev. 1.30 28 HT82A523R May 13, 2008 ...
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... These instructions are the key to decision making and branching within the pro- gram perhaps determined by the condition of certain in- put switches or by the condition of internal data bits. 29 HT82A523R May 13, 2008 ...
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... Table conventions: x: Bits immediate data m: Data Memory address A: Accumulator i: 0~7 number of bits addr: Program memory address Description 30 HT82A523R Cycles Flag Affected AC, OV Note AC AC ...
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... For the CLR WDT1 and CLR WDT2 instructions the TO and PDF flags may be affected by the execution status. The TO and PDF flags are cleared after both CLR WDT1 and CLR WDT2 instructions are consecutively executed. Otherwise the TO and PDF flags remain unchanged. Rev. 1.30 Description 31 HT82A523R Cycles Flag Affected 1 None Note 1 ...
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... Operation ACC ACC AND x Affected flag(s) Z ANDM A,[m] Logical AND ACC to Data Memory Description Data in the specified Data Memory and the Accumulator perform a bitwise logical AND op- eration. The result is stored in the Data Memory. Operation [m] ACC AND [m] Affected flag(s) Z Rev. 1.30 32 HT82A523R May 13, 2008 ...
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... The TO, PDF flags and the WDT are all cleared. Note that this instruction works in conjunc- tion with CLR WDT1 and must be executed alternately with CLR WDT1 to have effect. Re- petitively executing this instruction without alternately executing CLR WDT1 will have no effect. Operation WDT cleared TO 0 PDF 0 Affected flag(s) TO, PDF Rev. 1.30 addr 33 HT82A523R May 13, 2008 ...
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... This instruction stops the program execution and turns off the system clock. The contents of the Data Memory and registers are retained. The WDT and prescaler are cleared. The power down flag PDF is set and the WDT time-out flag TO is cleared. Operation TO 0 PDF 1 Affected flag(s) TO, PDF Rev. 1. HT82A523R May 13, 2008 ...
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... No operation is performed. Execution continues with the next instruction. Operation No operation Affected flag(s) None OR A,[m] Logical OR Data Memory to ACC Description Data in the Accumulator and the specified Data Memory perform a bitwise logical OR oper- ation. The result is stored in the Accumulator. Operation ACC ACC OR [m] Affected flag(s) Z Rev. 1.30 addr 35 HT82A523R May 13, 2008 ...
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... The contents of the specified Data Memory are rotated left by 1 bit with bit 7 rotated into bit 0. The rotated result is stored in the Accumulator and the contents of the Data Memory re- main unchanged. Operation ACC.(i+1) ACC.0 [m].7 Affected flag(s) None Rev. 1.30 Stack Stack Stack [m]. 0~6) 36 HT82A523R May 13, 2008 ...
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... Data in the specified Data Memory and the carry flag are rotated right by 1 bit. Bit 0 re- places the Carry bit and the original carry flag is rotated into bit 7. The rotated result is stored in the Accumulator and the contents of the Data Memory remain unchanged. Operation ACC.i [m].(i+1 0~6) ACC [m].0 Affected flag(s) C Rev. 1.30 [m]. 0~6) 37 HT82A523R May 13, 2008 ...
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... Set Data Memory Description Each bit of the specified Data Memory is set to 1. Operation [m] FFH Affected flag(s) None SET [m].i Set bit of Data Memory Description Bit i of the specified Data Memory is set to 1. Operation [m].i 1 Affected flag(s) None Rev. 1.30 [ HT82A523R May 13, 2008 ...
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... The result is stored in the Accumulator. Note that if the result of subtraction is nega- tive, the C flag will be cleared to 0, otherwise if the result is positive or zero, the C flag will be set to 1. Operation ACC ACC Affected flag(s) OV, Z, AC, C Rev. 1.30 0 [m] [ HT82A523R May 13, 2008 ...
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... The low byte of the program code (last page) addressed by the table pointer (TBLP) is moved to the specified Data Memory and the high byte moved to TBLH. Operation [m] program code (low byte) TBLH program code (high byte) Affected flag(s) None Rev. 1.30 [m].7 ~ [m].4 [m].7 ~ [m].4 [m].3 ~ [m].0 40 HT82A523R May 13, 2008 ...
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... The result is stored in the Data Memory. Operation [m] ACC XOR [m] Affected flag(s) Z XOR A,x Logical XOR immediate data to ACC Description Data in the Accumulator and the specified immediate data perform a bitwise logical XOR operation. The result is stored in the Accumulator. Operation ACC ACC XOR x Affected flag(s) Z Rev. 1.30 41 HT82A523R May 13, 2008 ...
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... Package Information 32-pin LQFP (7´7) Outline Dimensions Symbol Rev. 1.30 Dimensions in mm Min. Nom. 8.9 6.9 8.9 6.9 0.8 0.35 1.35 0.1 0.45 0 HT82A523R Max. 9.1 7.1 9.1 7.1 1.45 1.6 0.75 0.2 7 May 13, 2008 ...
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... SSOP (300mil) Outline Dimensions Symbol Rev. 1.30 Dimensions in mil Min. Nom. 395 291 8 613 HT82A523R Max. 420 299 12 637 May 13, 2008 ...
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... QFP (14´14) Outline Dimensions Symbol Rev. 1.30 Dimensions in mm Min. Nom. 17.3 13.9 17.3 13.9 1 0.4 2.5 0.1 0.73 0 HT82A523R Max. 17.5 14.1 17.5 14.1 3.1 3.4 1.03 0.2 7 May 13, 2008 ...
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... Product Tape and Reel Specifications Reel Dimensions SSOP 48W Symbol Description A Reel Outer Diameter B Reel Inner Diameter C Spindle Hole Diameter D Key Slit Width T1 Space Between Flange T2 Reel Thickness Rev. 1.30 Dimensions in mm 330 1 100 0.1 13+0.5 0.2 2 0.5 32.2+0.3 0.2 38.2 0.2 45 HT82A523R May 13, 2008 ...
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... Perforation Position F Cavity to Perforation (Width Direction) D Perforation Diameter D1 Cavity Hole Diameter P0 Perforation Pitch P1 Cavity to Perforation (Length Direction) A0 Cavity Length B0 Cavity Width K1 Cavity Depth K2 Cavity Depth t Carrier Tape Thickness C Cover Tape Width Rev. 1.30 Dimensions 0.3 16 0.1 1.75 0.1 14.2 0.1 2 Min. 1.5+0.25 4 0.1 2 0.1 12 0.1 16.2 0.1 2.4 0.1 3.2 0.1 0.35 0.05 25.5 46 HT82A523R May 13, 2008 ...
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... Holtek s products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. Rev. 1.30 47 HT82A523R May 13, 2008 ...