ht82j31a Holtek Semiconductor Inc., ht82j31a Datasheet - Page 17

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ht82j31a

Manufacturer Part Number
ht82j31a
Description
16 Channel A/d Mcu With Spi Interface
Manufacturer
Holtek Semiconductor Inc.
Datasheet
As in the case of the other two modes, when the counter
is full and overflows, the timer will be reset to the value
already loaded into the preload register. If the timer in-
terrupt is enabled, an interrupt signal will also be gener-
ated. To ensure that the external pin PA4/TMR is
configured to operate as a pulse width measuring input
pin, two things have to happen. The first is to ensure that
the TM0 and TM1 bits place the timer/event counter in
the pulse width measuring mode, the second is to en-
sure that the port control register configures the pin as
an input. It should be noted that a timer overflow is one
of the wake-up sources.
Programmable Frequency Divider - PFD
The PFD output is pin-shared with the I/O pin PA3. The
PFD function is selected via configuration option, how-
ever, if not selected, the pin can operate as a normal I/O
pin. The timer overflow signal is the clock source for the
PFD circuit. The output frequency is controlled by load-
ing the required values into the timer prescaler registers
to give the required division ratio. The counter, driven by
the system clock which is divided by the prescaler value,
will begin to count-up from this preload register value
until full, at which point an overflow signal is generated,
causing the PFD output to change state. The counter
will then be automatically reloaded with the preload reg-
ister value and continue counting-up.
For the output to function, it is essential that the corre-
sponding bit of the Port A control register PAC bit 3 is
setup as an output. If setup as an input the PFD output
will not function, however, the pin can still be used as a
normal input pin. The PFD output will only be activated if
bit PA3 is set to 1 . This output data bit is used as the
on/off control bit for the PFD output. Note that the PFD
output will be low if the PA3 output data bit is cleared to
Using this method of frequency generation, and if a
crystal oscillator is used for the system clock, very pre-
cise values of frequency can be generated.
Rev. 1.00
0 .
PFD Output Control
17
Prescaler
Bits PSC0~PSC2 of the TMRC register are used to de-
fine the pre-scaling stages of the internal clock source of
the Timer/Event Counter.
I/O Interfacing
The Timer/Event Counter, when configured to run in the
event counter or pulse width measurement mode, re-
quire the use of the external PA4/ pin for correct opera-
tion. As this pin is a shared pin it must be configured
correctly to ensure it is setup for use as a Timer/Event
Counter input and not as a normal I/O pin. This is imple-
mented by ensuring that the mode select bits in the
Timer/Event Counter control register, select either the
event counter or pulse width measurement mode. Addi-
tionally the Port Control Register PAC bit 4 must be set
high to ensure that the pin is setup as an input. Any
pull-high resistor configuration option on this pin will re-
main valid even if the pin is used as a Timer/Event
Counter input.
Programming Considerations
When configured to run in the timer mode, the internal
system clock is used as the timer clock source and is
therefore synchronised with the overall operation of the
microcontroller. In this mode when the appropriate timer
register is full, the microcontroller will generate an inter-
nal interrupt signal directing the program flow to the re-
spective internal interrupt vector. For the pulse width
measurement mode, the internal system clock is also
used as the timer clock source but the timer will only run
when the correct logic condition appears on the external
timer input pin. As this is an external event and not syn-
c h r o n i s e d w i t h t h e i n t e r n a l t i m e r c l o c k , t h e
microcontroller will only see this external event when the
next timer clock pulse arrives. As a result, there may be
small differences in measured values requiring pro-
grammers to take this into account during programming.
The same applies if the timer is configured to be in the
event counting mode, which again is an external event
and not synchronised with the internal system or timer
clock.
September 19, 2007
HT82J31A

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