ht82j31a Holtek Semiconductor Inc., ht82j31a Datasheet - Page 28

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ht82j31a

Manufacturer Part Number
ht82j31a
Description
16 Channel A/d Mcu With Spi Interface
Manufacturer
Holtek Semiconductor Inc.
Datasheet
The CSEN bit in the SBCR register controls the overall
function of the SPI interface. Setting this bit high, will en-
able the SPI interface by allowing the SCS line to be ac-
tive, which can then be used to control the SPI inteface.
If the CSEN bit is low, the SPI interface will be disabled
and the SCS line will be in a floating condition and can
therefore not be used for control of the SPI interface.
The SBEN bit in the SBCR register must also be high
which will place the SDI line in a floating condition and
the SDO line high. If in Master Mode the SCK line will be
either high or low depending upon the clock polarity con-
figuration option. If in Slave Mode the SCK line will be in
a floating condition. If SBEN is low then the bus will be
disabled and SCS, SDI, SDO and SCK will all be in a
floating condition.
In the Master Mode the Master will always generate the
clock signal. The clock and data transmission will be ini-
tiated after data has been written to the SBDR register.
Rev. 1.00
SPI Interface Control Register
SPI Bus Timing
28
In the Slave Mode, the clock signal will be received from
an external master device for both data transmission or
reception. The following sequences show the order to
be followed for data transfer in both Master and Slave
Mode:
Master Mode:
Step 1. Select the clock source using the CKS bit in
Step 2. Setup the M0 and M1 bits in the SBCR control
Step 3. Setup the CSEN bit and setup the MLS bit to
Step 4. Setup the SBEN bit in the SBCR control
the SBCR control register
register to select the Master Mode and the
required Baud rate. Values of 00, 01 or 10 can
be selected.
this must be same as the Slave device.
register to enable the SPI interface.
choose if the data is MSB or LSB first,
September 19, 2007
HT82J31A

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