wm8400 Wolfson Microelectronics plc, wm8400 Datasheet - Page 136

• Manufacturer Part Number: wm8400
• Description: Wolfson Audioplustm Hi-fi Audio Codec And Power Management Unit For Mobile Multimedia
• Manufacturer: Wolfson Microelectronics plc

WM8400
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POWER MANAGEMENT OPERATING MODES
MMP CONTROL
The WM8400 can be used in conjunction with a Multi Media Processor (MMP) device. In such an
application, the WM8400 would provide power supplies to the MMP using the integrated DC-DC
Converters and LDO Regulators. The WM8400 can also generate a Reset signal for the MMP, which
is co-ordinated with the WM8400 power-up sequence.
The WM8400 provides a hardware input RSTTRIG as part of this MMP Control function. Setting
RSTTRIG to a logic high level (referenced to the HBVDD power domain) triggers the Reset Delay
Timer. In a typical application, the RSTTRIG signal could be wired to the PSEQ4 output; this will
trigger the Reset Delay Timer automatically as part of the power-up sequence.
If any of the enabled DC-DC Converters or LDO Regulators is Under Voltage, then RSTTRIG will not
immediately trigger the Reset Delay Timer. If the Under Voltage is not cleared within 500ms of the
start-up signal NPDN being asserted, the Reset Delay Timer will be triggered at this point.
If RSTTRIG is not asserted within 500ms of the start-up signal NPDN being asserted, the Reset
Delay Timer will be triggered at this point. In this event, the interrupt event CDELAY Timeout
(CDEL_TO_EINT) will be set.
The duration of the Reset Delay Timer is set by the value of a capacitor connected to CDELAY. See
“Applications Information” for more details of this capacitor.
On completion of the Reset Delay Timer, the WM8400 enables the MMP by setting the NRST output
to a logic high level (referenced to the MBVDD power domain). This signal is used to hold the MMP
in a Reset state whilst the WM8400 starts up.
If a CDELAY error condition occurs (eg. due to CDELAY/GND short circuit or unsuitable CDELAY
capacitance), then normal WM8400 functionality cannot be supported and a device shutdown is
initiated. The CDEL_TO_EINT is also set under this condition.
The WM8400 has three operating modes, including two sleep modes. The sleep modes result in
reduced power consumption and restricted functionality. The operating mode may be selected in
software via the PWR_STATE register field. Deep Sleep mode may also be selected in hardware by
asserting HSLEEP or MSLEEP.
Table 79 provides a summary of the WM8400 functions in Active, Soft Sleep and Deep Sleep
Operating modes. Note that the “Hibernate” state of the DC converters and LDO regulators is
configurable, as described below.
Table 79 WM8400 Operating Modes
When the CODEC is placed in Half-Bias mode, full functionality is maintained, but the power savings
will result in slightly degraded performance of the analogue functions.
When the DC-DC Converters are placed in Standby/Hysteretic mode, this results in reduced
regulation of the DC output, and reduced power consumption. When the DC-DC converters are
placed in Hibernate, they are either disabled or operate in a low power LDO mode, depending on
user settings.
When the LDOs are placed in Hibernate mode, they are either disabled or operate in a low power
mode, depending on user settings.
Active
Soft Sleep
Deep Sleep
OPERATING MODE
Active
Half-bias
Off
CODEC
DC-DC CONVERTERS LDO REGULATORS
Active
Standby/Hysteretic
Hibernate
PP, April 2009, Rev 3.0
Active
Active
Hibernate
Pre-Production
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