srf-2724cs RF Micro Devices, srf-2724cs Datasheet - Page 22

• Manufacturer Part Number: srf-2724cs
• Description: 2.4ghz Low-if 1.5mbps Fsk Transceiver
• Manufacturer: RF Micro Devices

SRF-2724CS
ATM <2:0> - Register 2, Bits 2-4
Analog Test Mode: The test mode selected is described in Table 15. The performance of the SRF-2724CS is not specified in
these test modes. Although primarily intended for IC test and debug, they also can help in debugging the radio system. The
default (power-up) state of these bits is ATM<2:0>=<0,0,0>. When a non-zero value is written to the field, the RSSI and AOUT
pins become analog test access ports, giving access to the outputs of key signal processing stages in the transceiver. During
normal operation, ATM<2:0> must be set to all zeros.
DTM <2:0> - Register 2, Bits 5-7
Digital Test Mode: The DTM<2:0> bit functions are described in Table 16. The performance of the SRF-2724CS is not specified
in these test modes. Although primarily intended for IC test and debug, they also can help in debugging the radio system. The
default (power up) state of these bits is DTM<2:0>=<0,0,0>. When a non-zero value is written to these fields, the DOUT and
PAON pins become a digital test access port for key digital signals in the transceiver. During normal operation, DTM<2:0> must
be set to all zeros.
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Table 15: Analog Test Control Bits
Table 16: Digital Test Control Bits
DTM2
ATM2
0
0
0
0
1
1
1
1
0
0
0
0
1
DTM1
ATM1
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0
0
1
1
0
0
1
1
0
0
1
1
0
DTM0
ATM0
0
1
0
1
0
1
0
1
0
1
0
1
0
1.67V Voltage Reference
Q IF Filter - ve Output
S - D Modulation LSB
I IF Limiter Outputs
IF Filter - ve Output
IF Limiter Outputs
IF Filter Output
No connect
PA Control
PA Control
PA Control
PA Control
PAON
RSSI
RSSI
Proposed
Sigma - Delta Modulation MSB
PLL Reference Divider Output
VCO Modulation Port Input
PLL Main Divider Output
IF Filter + ve Output
Q IF Limiter Outputs
Q IF Limiter Outputs
Q IF Filter Output
AGC Switch State
Q IF + ve Output
Set AOUT bit
No connect
Data Out
AOUT
DOUT
Prelim DS090410