srf-2724cs RF Micro Devices, srf-2724cs Datasheet - Page 23

• Manufacturer Part Number: srf-2724cs
• Description: 2.4ghz Low-if 1.5mbps Fsk Transceiver
• Manufacturer: RF Micro Devices

DATA INTERFACES
Baseband Interface: DIN and DOUT
The DIN and DOUT pins are digital CMOS signals that correspond to FSK modulation of the carrier frequency. The SRF-2724CS
is designed to operate as an FSK transceiver in the 2.4GHz ISM band. The frequency deviation and transmit filtering is deter-
mined in the transceiver.
Data on the DIN pin is filtered and presented to the transmit two-port modulator. There is no re-timing of the bits, so the trans-
mitted FSK data takes its timing from the input data. In the receive chain, FSK demodulation, data filtering, and data slicing
take place in the SRF-2724CS, and the digital data is output on the DOUT pin. Bit and word rate timing recovery are performed
off chip. The data filter output is available on the AOUT pin for use with an optional external data slicer.
RSSI and FREF
FREF (pin 9) is the master reference frequency for the transceiver. It supplies the frequency reference for the RF channel fre-
quency and the filter tuning. The FREF pin is a CMOS input with internal biasing resistors. It can be AC coupled to sine or
square wave source. The FREF input can also be driven by a CMOS logic output. The frequency of the FREF input is limited to
one of: 6.144MHz or 12.288MHz.
The Received Signal Strength Indicator (RSSI) pin supplies a voltage proportional to the logarithm of the received power level.
It is normally connected to the input of a low speed ADC and is used during channel scanning to detect clear channels on
which the radio may transmit. It can also be used to set transmit power to optimize power consumption while maintaining an
acceptable bit error rate (BER).
PA Control Outputs (PAON and AOUT)
The PAON (PA control) is a CMOS output that controls an optional off-chip RF PA. It outputs a logic high when the PA should be
enabled and a logic low at all other times. This output is inhibited when the PLL fails to lock.
AOUT (pin 7) normally supplies the analog (not data-sliced) data output, but it can also be configured as an open-drain output
for transmit power control. This mode is controlled by the TPC bit in Register 0. This bit can be changed at any time, but the
AOUT pin will not change mode until the beginning of the next transmit slot, triggered by a falling edge on RXON (see Figure 6
and Table 17 for details).
In analog test modes the RSSI and AOUT pins become analog test access ports that allow the user to observe internal signals
in the SRF-2724CS.
Figure 6: Power Amplifier Interface
Prelim DS090410
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Output from
Proposed
RXON
PAON
TRFO
t1
t4
t2
t3
SRF-2724CS
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