srf-2724cs RF Micro Devices, srf-2724cs Datasheet - Page 8

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srf-2724cs

Manufacturer Part Number
srf-2724cs
Description
2.4ghz Low-if 1.5mbps Fsk Transceiver
Manufacturer
RF Micro Devices
Datasheet
SRF-2724CS
8 of 26
Pin
11
15
26
28
4
5
Function
VTUNE
DATA
RSSI
QPO
VBG
EN
Description
Charge Pump Output of the phase detector. This is connected to the exter-
nal PLL loop filter.
VCO Tuning Voltage input from the PLL loop filter. This pin is very sensitive
to noise coupling and leakage currents.
Bandgap Decouple Voltage. Decoupled to ground with 220nF capacitor.
Buffered Analog RSSI output with a nominal sensitivity of 35mV/dB. In
analog test modes, this pin and the AOUT output become test access
points controlled by the serial control bus.
Control Bus Enable. Enable pin for the three-wire serial control bus that
sets the operating frequency and programmable options. The control regis-
ters are loaded on a low-to-high transition of the signal. Serial control bus
data is ignored when this signal is high. This is a CMOS input, and the
thresholds are referenced to VDD and VSS.
Serial Control Bus Data. 16-bit words, which include programming data
and the two-bit address of a control, register. This is a CMOS input, and the
thresholds are referenced to VDD and VSS.
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
Mode Control and Interface Lines, cont.
Serial Bus Signals
Proposed
Interface Schematic
DATA
DATA
CLK
CLK
EN
EN
VTUNE
4
4
5
6
5
6
RVP LL
RSSI
OP
AMP
10
15
VDD
VDD
VSS
VSS
31
31
8
8
MUX
MUX
RSSI
TPI
5.5 k
5.5 k
V SS
VCCA
8
VSS
24
8
Prelim DS090410
100 Ω
3.7k
1.7p
1.7p
VCCA
VSS
24
8
1.25V
11 Q PO
28 RSSI

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