laxp2-17e Lattice Semiconductor Corp., laxp2-17e Datasheet - Page 60

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laxp2-17e

Manufacturer Part Number
laxp2-17e
Description
Latticexp2 Fpga Data Sheets
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
LA-LatticeXP2 External Switching Characteristics
General I/O Pin Parameters (using Primary Clock without PLL)
t
t
t
t
t
f
General I/O Pin Parameters (using Edge Clock without PLL)
t
t
t
t
t
f
General I/O Pin Parameters (using Primary Clock with PLL)
t
t
CO
SU
H
SU_DEL
H_DEL
MAX_IO
COE
SUE
HE
SU_DELE
H_DELE
MAX_IOE
COPLL
SUPLL
Parameter
Clock to Output - PIO Output Register
Clock to Data Setup - PIO Input Register
Clock to Data Hold - PIO Input Register
Clock to Data Setup - PIO Input Register with Data Input Delay
Clock to Data Hold - PIO Input Register with Input Data Delay
Clock Frequency of I/O and PFU Register
Clock to Output - PIO Output Register
Clock to Data Setup - PIO Input Register
Clock to Data Hold - PIO Input Register
Clock to Data Setup - PIO Input Register with Data Input Delay
Clock to Data Hold - PIO Input Register with Input Data Delay
Clock Frequency of I/O and PFU Register
Clock to Output - PIO Output Register
Clock to Data Setup - PIO Input Register
Over Recommended Operating Conditions
Description
3-16
1
1
1
DC and Switching Characteristics
LA-LatticeXP2 Family Data Sheet
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2
LA-XP2-5
LA-XP2-8
LA-XP2-17
LA-XP2-5
LA-XP2-8
LA-XP2-17
Device
Min.
0.00
0.00
0.00
1.94
1.94
1.94
1.94
1.94
1.94
0.00
0.00
0.00
0.00
0.00
0.00
1.63
1.63
1.63
1.64
1.64
1.64
0.00
0.00
0.00
1.43
1.43
1.43
-5
Max.
4.72
4.72
4.72
4.00
4.00
4.00
3.80
3.80
3.80
311
311
Units
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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