cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 249

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

28236-DSH-001-B
8.0 DMA Coprocessor
8.1 Overview
The DMA coprocessor performs high-speed sustained data transfers to and from
the host memory space. It is controlled by the segmentation and reassembly
coprocessors.
host memory (through the PCI bus) to the segmentation coprocessor, and to
transfer data from the reassembly coprocessor to the host memory space (through
the PCI bus).
performance. It uses burst transfers when possible to maximize utilization of the
host bus bandwidth, performs byte switching to accommodate misaligned
transfers, and carries out concurrent input and output transfers (alternating burst
reads and burst writes) to support simultaneous input and output data streams.
8.2 DMA Read
For outgoing messages, DMA read cycles move data from host memory to the
segmentation coprocessor using a gather DMA method. The maximum burst size
is thirteen 32-bit words, which correspond to one cell. The burst size can be
reduced by setting the MAX_BURST_LEN field in the PCI Configuration
register at a value less than 13 words.
8.3 DMA Write
For incoming messages, DMA write cycles move data from the reassembly
coprocessor to host memory using a scatter DMA method. The maximum burst
size is fourteen 32-bit words, which correspond to one ATM cell and a status
word appended to PM cells. The burst size can be reduced by setting the
MAX_BURST_LEN field in the PCI Configuration register at a value less than
13 words.
The major functions of the DMA coprocessor are to transfer data from the
In all modes of operation, the DMA coprocessor maintains a high level of
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