cn8236 Mindspeed Technologies, cn8236 Datasheet - Page 327

• Manufacturer Part Number: cn8236
• Description: Atm Servicesar Plus With Xbr Traffic Management
• Manufacturer: Mindspeed Technologies

CN8236
ATM ServiceSAR Plus with xBR Traffic Management
0x8c
The SEG_TXBASE register sets the base address in SAR-shared memory for the transmit queues and enables
the individual queues. The base address is 128-byte aligned and only the 16 most significant bits of the address
are specified in the SEG_TXBASE register.
0x90
28236-DSH-001-B
31–16
15–13
31–16
12–5
15–0
4–0
Bit
Bit
—
—
Segmentation Transmit Queue Base Register (SEG_TXBASE)
Segmentation Routing Tag Table Base Register (SEG_TAGBASE)
Field
Field
Size
Size
16
16
16
3
8
5
SEG_TXB[15:0]
Reserved
XMIT_INTERVAL[7:0]
TX_EN
Reserved
SEG_TAGB[15:0]
Name
Name
Mindspeed Technologies
Base address for the transmit queues.
Program and read as 0.
Interval for transmit queue READ_UD_PNTR update.
Transmit queues 0-TX_EN are enabled.
Always set to 0.
Base address for the routing tag table.
™
Description
Description
14.3 Segmentation Registers
14.0 CN8236 Registers
14-11