89ttm552 Integrated Device Technology, 89ttm552 Datasheet - Page 12

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89ttm552

Manufacturer Part Number
89ttm552
Description
Standalone 10g Simplex Traffic Manager
Manufacturer
Integrated Device Technology
Datasheet
Absolute Maximum Ratings
Absolute Maximum Ratings
Absolute Maximum Ratings
Absolute Maximum Ratings
of these conditions could result in permanent damage to the device. Normal operation should not be expected at these conditions. In addition, expo-
sure to absolute maximum rated conditions (or near absolute maximum rated conditions) for extended periods may affect device reliability.
page 1-13 and AC Characteristics on page 1-15.
89TTM552 Electrical Specifications
89TTM552 Electrical Specifications
89TTM552 Electrical Specifications
89TTM552 Electrical Specifications
IDT 89TTM552
Some data are TBD and will be published as they become available.
The specifications are subject to change without notice.
The absolute maximum ratings are the maximum conditions that the device can withstand without sustaining permanent damage. Exceeding any
Operation of the device is not guaranteed at the absolute maximum ratings, but rather at the operating conditions outlined in DC Characteristics on
VDD18
VDD26
VDD33
VDD33(VDDP)
VDDO_25V_LVDS_DSR
VDDO_25V_LVDS_DST
GND
PLL_TX_VSSA
PLL_TX_VDDA
PLL_TX_VDD
PLL_RX_VSSA
PLL_RX_VDDA
PLL_RX_VDD
PLL_SYS_VSSA
PLL_SYS_VDDA
PLL_SYS_VDD
Symbol
T
T
T
STORAGE
REWORK
T
SOLDER
JMAX
Signal Name
Junction temperature under bias
Storage temperature
Storage temperature range
Soldering temperature
Rework temperature
I/O Type
Parameter
Table 12 Miscellaneous Signals (Part 2 of 2)
Table 13 Absolute Maximum Ratings
Dir.
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
12 of 37
Freq.
1.8V core power
2.6V I/O power for SSTL2 I/Os:
Isolated output buffer supply set nominally to 2.6V
3.3V I/O power for LVTTL I/Os
3.3V LVDS receiver power
Ground
3.3V analog ground for Tx LVDS PLLs
3.3V analog power for Tx LVDS PLLs
1.8V digital power for Tx LVDS PLLs
3.3V analog ground for Rx LVDS PLLs
3.3V analog power for Rx LVDS PLLs
1.8V digital power for Rx LVDS PLLs
3.3V analog ground for core clock PLL
3.3V analog power for core clock PLL
1.8V digital power for core clock PLL
2.5V I/O power for DSR LVDS I/Os
2.5V I/O power for DST LVDS I/Os
Min
–40
Max
105
150
215
204
85
Remarks
Units
°C
°C
°C
°C
°C
Long term storage
Conditions
April 7, 2005

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