LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 185

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

Register: 0x4A (0xCA)
Response ID Zero (RESPID0)
Read/Write
RESPID0
7
x
Note:
x
To reset a timer before it expires and obtain repeatable
delays, the time value must be written to zero first, and then
written back to the desired value. This is also required
when changing from one time value to another. See
Chapter 2, “Functional Description,”
how interrupts are generated when the timers expire.
GEN bit in the
is set. Refer to the table under
(STIME0), bits [3:0], for the available time-out periods.
Response ID Zero
RESPID0 and RESPID1 contain the selection or
reselection IDs. In other words, these two 8-bit registers
contain the ID that the chip responds to on the SCSI bus.
Each bit represents one possible ID with the most
significant bit of RESPID1 representing ID 15 and the
least significant bit of RESPID0 representing ID 0. The
SCSI Chip ID (SCID)
used during arbitration. The chip can respond to more
than one ID because more than one bit can be set in the
Response ID One (RESPID1)
(RESPID0)
only one ID value in the
x
registers. However, the chip can arbitrate with
SCSI Interrupt Status One (SIST1)
x
ID
register still contains the chip ID
x
SCSI Chip ID (SCID)
and
SCSI Timer Zero
x
for an explanation of
Response ID Zero
x
register.
register
0
x
[7:0]
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