LSI53C875 LSI Logic, LSI53C875 Datasheet - Page 41

• Manufacturer Part Number: LSI53C875
• Description: PCI to Ultra SCSI I/O Processor
• Manufacturer: LSI Logic

The following steps determine if any bytes remain in the data path when
the chip halts an operation:
Asynchronous SCSI Send –
Step 1. If the DMA FIFO size is set to 88 bytes, look at the
Step 2. Read bit 5 in the
Synchronous SCSI Send –
Step 1. If the DMA FIFO size is set to 88 bytes, look at the
PCI Cache Mode
(DFIFO)
if there are bytes left in the DMA FIFO. To make this calculation,
subtract the seven least significant bits of the DBC register from
the 7-bit value of the DFIFO register. AND the result with 0x7F
for a byte count between 0 and 88.
If the DMA FIFO size is set to 536 bytes (bit 5 of the
Five (CTEST5)
the
the DMA FIFO Byte Offset Counter, which consists of bits [1:0]
in the
DMA FIFO (DFIFO)
byte count between 0 and 536.
Two (SSTAT2)
SCSI Output Data Latch (SODL)
SSTAT0 or SSTAT2 register, then the least significant byte or
the most significant byte in the SODL register is full,
respectively. Checking this bit also reveals bytes left in the
SODL register from a Chained Move operation with an odd byte
count.
(DFIFO)
if there are bytes left in the DMA FIFO. To make this calculation,
subtract the seven least significant bits of the DBC register from
the 7-bit value of the DFIFO register. AND the result with 0x7F
for a byte count between 0 and 88.
If the DMA FIFO size is set to 536 bytes (bit 5 of the
Five (CTEST5)
the
DMA Byte Counter (DBC)
DMA Byte Counter (DBC)
Chip Test Five (CTEST5)
and
and
DMA Byte Counter (DBC)
DMA Byte Counter (DBC)
registers to determine if any bytes are left in the
register), subtract the 10 least significant bits of
register), subtract the 10 least significant bits of
SCSI Status Zero (SSTAT0)
register. AND the result with 0x3FF for a
register from the 10-bit value of
register from the 10-bit value of
register and bits [7:0] of the
register. If bit 5 is set in the
registers and calculate
registers and calculate
and
SCSI Status
DMA FIFO
DMA FIFO
Chip Test
Chip Test
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