VSC8117QP2 VITESSE [Vitesse Semiconductor Corporation], VSC8117QP2 Datasheet - Page 2

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VSC8117QP2

Manufacturer Part Number
VSC8117QP2
Description
ATM/SONET/SDH 622/155 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery
Manufacturer
VITESSE [Vitesse Semiconductor Corporation]
Datasheet
ATM/SONET/SDH 622/155 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
Page 2
CRU clock and data signals. (In this mode the VSC8117 operates just like the VSC8111 and VSC8116). The
receive section also contains a SONET/SDH frame detector circuit which is used to provide frame pluses during
the A1, A2 boundary in the serial to parallel converter. This only occurs when OOF is high. Both internal and
external LOS functions are supported. The high speed serial signals can be made PECL compatible or LVPECL
compatible by setting the proper voltage on the V
VSC8117 Block Diagram
RXCLKIN+/-
TXDATAOUT+/-
RXDATAIN+/-
DSBLCRU
CRUREFCLK
CRUREFSEL
EQULOOP
FACLOOP
CRUEQLP
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
1
0
0
1
CRU
losdet
Q
REC-DATA
REC-CLK
D
VITESSE
VITESSE SEMICONDUCTOR CORPORATION
SEMICONDUCTOR CORPORATION
0
1
1
0
1
0
1
0
0
1
DDP
D Q
supply pins
1
0
0
1
0
1
CMU
Divide-by-8
Divide-by-8
MUX
FRAMER
8:1
DEMUX
1:8
Q D
D Q
8
8
VSC8117
Data Sheet
TXIN[7:0]
TXLSCKOUT
G52221-0, Rev 4.1
STS12
REFCLKP+/-
REFCLK
CMUFREQSEL
LOOPTIM0
OOF
FP
RXOUT[7:0]
RXLSCKOUT
LOSDETEN_
LOSPECL
1/8/00

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