M24C01-x STMICROELECTRONICS [STMicroelectronics], M24C01-x Datasheet - Page 16

• Manufacturer Part Number: M24C01-x
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Device operation
3.7
3.7.1
16/37
Figure 9.
Read operations
Read operations are performed independently of the state of the Write Control (WC) signal.
The device has an internal address counter which is incremented each time a byte is read.
Random Address Read
A dummy Write is first performed to load the address into this address counter (as shown in
Figure
condition, and repeats the device select code, with the Read/Write bit (RW) set to 1. The
device acknowledges this, and outputs the contents of the addressed byte. The bus master
must not acknowledge the byte, and terminates the transfer with a Stop condition.
First byte of instruction
with RW = 0 already
decoded by the device
10) but without sending a Stop condition. Then, the bus master sends another Start
Write cycle polling flowchart using ACK
ReStart
Stop
NO
NO
Doc ID 5067 Rev 18
Start condition
Device select
addressing the
with RW = 0
in progress
operation is
Write cycle
Returned
memory
ACK
Next
YES
Write operation
Write operation
Continue the
Data for the
M24C08-x M24C04-x M24C02-x M24C01-x
YES
NO
and Receive ACK
Send Address
condition
Start
Random Read operation
Device select
Continue the
with RW = 1
YES
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