M24C01-x STMICROELECTRONICS [STMicroelectronics], M24C01-x Datasheet - Page 6

• Manufacturer Part Number: M24C01-x
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

Description
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Description
These I²C-compatible electrically erasable programmable memory (EEPROM) devices are
organized as 1024/512/256/128 x 8 (M24C08-x, M24C04-x, M24C02-x and M24C01-x).
Figure 1.
I²C uses a two-wire serial interface, comprising a bidirectional data line and a clock line. The
devices carry a built-in 4-bit Device Type Identifier code (1010) in accordance with the I²C
bus definition.
The device behaves as a slave in the I²C protocol, with all memory operations synchronized
by the serial clock. Read and Write operations are initiated by a Start condition, generated
by the bus master. The Start condition is followed by a device select code and Read/Write
bit (RW) (as described in
When writing data to the memory, the device inserts an acknowledge bit during the 9
time, following the bus master’s 8-bit transmission. When data is read by the bus master, the
bus master acknowledges the receipt of the data byte in the same way. Data transfers are
terminated by a Stop condition after an Ack for Write, and after a NoAck for Read.
Table 2.
E0, E1, E2
SDA
SCL
WC
V
V
CC
SS
Signal name
Logic diagram
Signal names
Table
E0-E2
Chip Enable
Serial Data
Serial Clock
Write Control
Supply voltage
Ground
SCL
WC
Doc ID 5067 Rev 18
3), terminated by an acknowledge bit.
3
V CC
V SS
Function
M24Cxx
M24C08-x M24C04-x M24C02-x M24C01-x
AI02033
SDA
Input
Input/output
Input
Input
Direction
th
bit