ST7FLITE29 STMICROELECTRONICS [STMicroelectronics], ST7FLITE29 Datasheet - Page 83

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ST7FLITE29

Manufacturer Part Number
ST7FLITE29
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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10-BIT A/D CONVERTER (ADC) (Cont’d)
11.5.6 Register Description
CONTROL/STATUS REGISTER (ADCCSR)
Read /Write (Except bit 7 read only)
Reset Value: 0000 0000 (00h)
Bit 7 = EOC End of Conversion
This bit is set by hardware. It is cleared by soft-
ware reading the ADCDRH register.
0: Conversion is not complete
1: Conversion complete
Bit 6 = SPEED ADC clock selection
This bit is set and cleared by software. It is used
together with the SLOW bit to configure the ADC
clock speed. Refer to the table in the SLOW bit de-
scription.
Bit 5 = ADON A/D Converter on
This bit is set and cleared by software.
0: A/D converter and amplifier are switched off
1: A/D converter and amplifier are switched on
Bit 4:3 = Reserved. Must be kept cleared.
Bit 2:0 = CH[2:0] Channel Selection
These bits are set and cleared by software. They
select the analog input to convert.
*The number of channels is device dependent. Refer to
the device pinout description.
EOC SPEED ADON
7
Channel Pin*
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
0
CH3
CH2
0
0
0
0
1
1
1
CH2
CH1
CH1
0
0
1
1
0
0
1
CH0
CH0
0
1
0
1
0
1
0
0
DATA REGISTER HIGH (ADCDRH)
Read Only
Reset Value: xxxx xxxx (xxh)
Bit 7:0 = D[9:2] MSB of Analog Converted Value
AMP CONTROL/DATA REGISTER LOW (AD-
CDRL)
Read /Write
Reset Value: 0000 00xx (0xh)
Bit 7:5 = Reserved. Forced by hardware to 0.
Bit 4 = AMPCAL Amplifier Calibration Bit
This bit is set and cleared by software.
0: Calibration off
1: Calibration on. The input voltage of the amp is
Bit 3 = SLOW Slow mode
This bit is set and cleared by software. It is used
together with the SPEED bit to configure the ADC
clock speed as shown on the table below.
Bit 2 = AMPSEL Amplifier Selection Bit
This bit is set and cleared by software.
0: Amplifier is not selected
1: Amplifier is selected
Note: When AMPSEL=1 it is mandatory that f
be less than or equal to 2 MHz.
Bit 1:0 = D[1:0] LSB of Analog Converted Value
D9
set to 0V.
7
7
0
D8
0
D7
f
f
0
f
CPU
CPU
f
ADC
CPU
/2
/4
AMP
CAL
D6
SLOW
D5
AMP-
SEL
D4
SLOW SPEED
ST7LITE2
0
0
1
D3
D1
83/131
D2
D0
0
1
x
ADC
0
0
1

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