ISPPAC-CLK5610V-01T100C LATTICE [Lattice Semiconductor], ISPPAC-CLK5610V-01T100C Datasheet - Page 3

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ISPPAC-CLK5610V-01T100C

Manufacturer Part Number
ISPPAC-CLK5610V-01T100C
Description
In-System Programmable, Zero-Delay Clock Generator with Universal Fan-Out Buffer
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
Lattice Semiconductor
Figure 2. ispClock5620 Functional Block Diagram
FBKSEL
REFSEL
REFVTT
FBKVTT
REFA+
REFB+
FBKA+
FBKB+
FBKA-
FBKB-
REFA-
REFB-
0
Profile Select
PS0
0
1
0
1
Control
1
PS1
2
DIVIDER
INPUT
(1-32)
3
(1-32)
M
N
FEEDBACK
DIVIDER
E
2
Configuration
DETECT
DETECT
PHASE
LOCK
LOCK
TDI
JTAG INTERFACE
TMS
RESET
TCK
FILTER
LOOP
TDO
PLL_BYPASS
VCO
3
SGATE
OUTPUT ENABLE CONTROLS
1
0
GOE
SKEW ADJUST
FEEDBACK
OEX
DIVIDERS
OUTPUT
(2-64)
(2-64)
(2-64)
(2-64)
(2-64)
V0
V1
V2
V3
V4
ispClock5600 Family Data Sheet
OEY
OUTPUT ROUTING
MATRIX
CONTROL
CONTROL
SKEW
SKEW
DRIVERS
DRIVERS
OUTPUT
OUTPUT
BANK_0A
BANK_0B
BANK_1A
BANK_1B
BANK_2A
BANK_2B
BANK_3A
BANK_3B
BANK_4A
BANK_4B
BANK_5A
BANK_5B
BANK_6A
BANK_6B
BANK_7A
BANK_7B
BANK_8A
BANK_8B
BANK_9A
BANK_9B

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