ISPPAC-POWR1014A LATTICE [Lattice Semiconductor], ISPPAC-POWR1014A Datasheet - Page 28

• Manufacturer Part Number: ISPPAC-POWR1014A
• Description: In-System Programmable Power Supply Supervisor, Reset Generator and Sequencing Controller
• Manufacturer: LATTICE [Lattice Semiconductor]

Lattice Semiconductor
not pulled up, the output status bit corresponding with that pin will read ‘1’, but a high output signal will not appear
on the pin.
Digital outputs may also be optionally controlled directly by the I
may be driven either from the PLD output or from the contents of the GP_OUTPUT[1:0] registers with the choice
user-settable in E
GP_OUTPUT registers.
Figure 20. I
The UES word may also be read through the I
2
C Output Monitor and Control Logic
2
CMOS memory. Each output may be independently set to output from the PLD or from the
0x0E - GP_OUTPUT1 (Read/Write)
0x0F - GP_OUTPUT2 (Read/Write)
0x03 - OUTPUT_STATUS0 (Read Only)
0x04 - OUTPUT_STATUS1 (Read Only)
OUT8
GP8
Routing
Output
b7
b7
b7
b7
1
X
Pool
PLD
PLD Output/GP_Output Register Select
GP_Output1
GP_Output2
OUT7
GP7
b6
b6
b6
b6
X
1
14
14
(E
2
OUT14
Configuration)
OUT6
GP14
I
GP6
2
b5
b5
b5
b5
C Interface Unit
14
MUX
2
C interface, with the register mapping shown in Figure 21.
OUT13
OUT5
GP13
GP5
b4
b4
b4
b4
Output_Status0
Output_Status1
28
14
OUT12
OUT4
GP12
GP4
b3
b3
b3
b3
2
C bus instead of by the PLD array. The outputs
GP3_ENb
OUT11
GP11
OUT3
b2
b2
b2
b2
ispPAC-POWR1014/A Data Sheet
14
HVOUT2
OUT10
GP10
GP2
b1
b1
b1
b1
HVOUT[1..2]
OUT[3..14]
HVOUT1
OUT9
GP1
GP9
b0
b0
b0
b0