UPD64084 NEC, UPD64084 Datasheet - Page 11

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UPD64084

Manufacturer Part Number
UPD64084
Description
THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
Manufacturer
NEC
Datasheet

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2. SYSTEM OVERVIEW
2.1
according to NRMD on the serial bus.
Note
Serial bus setting
NRMD = 0
YCS mode
NRMD = 1
YCS+ mode
Mode name
The PD64084 can operate in the following major four signal processing modes. Mode selection is performed
Operation Modes
3D Y/C separation, Frame-recursive YNR/CNR, each function is independence. So these don't operate at the
same time.
Y/C separation
2D Y/C
separation
and YCNR
Function
Note
AYI : Composite signal
AYI : Composite signal
Pin input
Table 2-1. Operation Modes
Data Sheet S16021EJ2V0DS
Burst locked clock
(4f
Burst locked clock
(4f
SC
SC
System clock
, 8f
, 8f
SC
SC
)
)
Comp.
Comp.
For standard signals, motion-adaptive three-
dimensional Y/C separation is performed.
For nonstandard signals, inter-line Y/C
separation is performed.
Inter-line Y/C separation and Frame recursive
YNR and CNR is performed.
ADC
4f
ADC
4f
SC
SC
Feature Model diagram
4-Mbit memory
YCS
(2D)
(3D/2D)
YCS
4-Mbit memory
YNR
CNR
PD64084
DAC
DAC
DAC
DAC
Y
C
Y
C
11

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