K4T56163QI-ZCLCC SAMSUNG [Samsung semiconductor], K4T56163QI-ZCLCC Datasheet - Page 30

• Manufacturer Part Number: K4T56163QI-ZCLCC
• Description: 256Mb I-die DDR2 SDRAM Specification
• Manufacturer: SAMSUNG [Samsung semiconductor]

K4T56163QI
DQS
Note1
Hold Slew Rate
Note : DQS signal must be monotonic between Vil(dc)max and Vih(dc)min.
Rising Signal
V
V
V
V
V
V
IL(dc)
IL(ac)
DDQ
REF(dc)
IH(ac)
IH(dc)
Figure 12 - IIIustration of tangent line for tDH (single-ended DQS)
max
max
V
V
V
V
V
V
V
min
min
DDQ
IH(ac)
IH(dc)
IL(dc)
IL(ac)
SS
V
REF(dc)
SS
max
max
=
min
min
dc to V
dc to V
region
region
tangent line [ V
REF
REF
∆TR
tDS
REF(dc)
tangent
line
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- Vil(dc)max ]
tDH
Hold Slew Rate
Falling Signal
∆TR
nominal
line
=
tangent line [ Vih(dc)min - V
tDS
tangent
line
tDH
∆TF
∆TF
nominal
line
Rev. 1.0 October 2007
DDR2 SDRAM
REF(dc)
]