SSTUB32866BHLFT IDT, Integrated Device Technology Inc, SSTUB32866BHLFT Datasheet - Page 18

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SSTUB32866BHLFT

Manufacturer Part Number
SSTUB32866BHLFT
Description
IC REGIST BUFF 25BIT DDR2 96-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of SSTUB32866BHLFT

Number Of Bits
25, 14
Logic Type
1:1, 1:2 Configurable Registered Buffer with Parity
Supply Voltage
1.7 V ~ 1.9 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
96-BGA
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
410(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SSTUB32866BHLFT
Manufacturer:
NXP
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Part Number:
SSTUB32866BHLFT
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
2. Device standard (cont'd)
1165A—3/21/07
Figure 17 — Timing diagram for the second SSTU32866 (1:2 register-B configuration) device used in
(not used)
D1•D14 †
PAR_IN †
Q1•Q14
RST#
QERR#
DCS# †
CSR# †
CK# †
CK †
After RST# is switched from high to low, all data and clock input signals must be held at valid logic levels (not floating) for a
munimum time of t
PPO
INACT
max.
pair; C0=1, C1=1; RST# switches from H to L
RST# to PPO
RST# to Q
H, L, or X
t RPHL
t RPHL
18
t inact
t RPLH
RST# to QERR#
Advance Information
H or L
ICSSSTUB32866B

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