SSTUB32866BHLFT IDT, Integrated Device Technology Inc, SSTUB32866BHLFT Datasheet - Page 23

• Manufacturer Part Number: SSTUB32866BHLFT
• Description: IC REGIST BUFF 25BIT DDR2 96-BGA
• Manufacturer: IDT, Integrated Device Technology Inc

Specifications of SSTUB32866BHLFT

• Number Of Bits: 25, 14
• Logic Type: 1:1, 1:2 Configurable Registered Buffer with Parity
• Supply Voltage: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 96-BGA
• Logic Family: SSTU
• Logical Function: Registered Buffer
• Number Of Elements: 1
• Number Of Inputs: 25
• Number Of Outputs: 25
• High Level Output Current: -8mA
• Low Level Output Current: 8mA
• Propagation Delay Time: 3ns
• Operating Supply Voltage (typ): 1.8V
• Operating Supply Voltage (max): 1.9V
• Operating Supply Voltage (min): 1.7V
• Clock-edge Trigger Type: Posit/Negat-Edge
• Polarity: Non-Inverting
• Technology: CMOS
• Frequency (max): 410(Min)MHz
• Mounting: Surface Mount
• Pin Count: 96
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Notes: 1. C
1165A—3/21/07
LVCMOS
Input
Input
CK#
CK
I
RST#
DD
Input
(2)
2. I
3. All input pulses are supplied by generators having the following chareacteristics: PRR ≤10 MHz,
4. The outputs are measured one at a time with one transition per measurement.
5. V
6. V
7. V
8. V
9. t
Zo=50Ω, input slew rate = 1 V/ns ±20% (unless otherwise specified).
t
PLH
VOLTAGE AND CURRENT WAVEFORMS
INPUTS ACTIVE AND INACTIVE TIMES
DD
INACT
REF
ID
IH
IL
SETUP AND HOLD TIMES
L
VOLTAGE WAVEFORMS
incluces probe and jig capacitance.
VOLTAGE WAVEFORMS
= V
tested with clock and data inputs held at V
= V
= 600 mV
and t
= V
PULSE DURATION
V
CK Inputs
REF
REF
DD
V
V
10%
ICR
DD
REF
/2
PHL
t
SU
/2
- 250 mV (ac voltage levels) for differential inputs. V
+ 250 mV (ac voltage levels) for differential inputs. V
Figure 6 ⎯ Parameter Measurement Information (V
are the same as t
t
W
V
ICR
t
H
R
Test Point
Test Point
L =
T
L
100Ω
= 50Ω
V
DD
V
V
ICR
/2
REF
PDM
t
.
ACT
90%
V
0V
V
V
V
V
DD
ID
CK#
CK
ID
IH
IL
DUT
LOAD CIRCUIT
Out
DD
23
or GND, and Io = 0mA.
LVCMOS
Output
Output
RST#
CK#
Input
T
CK
L
= 350ps, 50Ω
C
L
t
= 30 pF
PLH
PROPAGATION DELAY TIMES
IL
Advance Information
IH
PROPAGATION DELAY TIMES
DD
VOLTAGE WAVEFORMS
= GND for LVCMOS input.
= V
(1)
VOLTAGE WAVEFORMS
V
= 1.8V ± 0.1V)
ICR
V
DD
ICSSSTUB32866B
TT
for LVCMOS input.
V
V
DD
DD
Test Point
/2
R
R
L
L
= 1000Ω
= 1000Ω
t
V
RPHL
V
ICR
TT
V
t
PHL
TT
V
V
V
ID
V
V
OH
OL
V
V
OH
OL
IH
IL