DS21448A1 Maxim Integrated, DS21448A1 Datasheet - Page 54

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DS21448A1

Manufacturer Part Number
DS21448A1
Description
Network Controller & Processor ICs 3.3V E1/T1/J1 Quad Interface
Manufacturer
Maxim Integrated
Datasheet

Specifications of DS21448A1

Part # Aliases
90-21448-0A1

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Part Number:
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Table 10-D. AC Characteristics—Receive Side
(V
RCLK Period
RCLK Pulse Width
RCLK Pulse Width
Delay RCLK to RPOS, RNEG,
PBEO, RBPV Valid
Note 1: E1 mode.
Note 2: T1 or J1 mode.
Note 3: Jitter attenuator enabled in the receive path.
Note 4: Jitter attenuator disabled or enabled in the transmit path.
Figure 10-9. Receive-Side Timing
DD
= 3.3V ± 5%, T
PARAMETER
RPOS, RNEG
NOTE 1: RCES = 1 (CCR2.0) OR CES = 1.
NOTE 2: RCES = 0 (CCR2.0) OR CES = 0.
NOTE 3: RNEG IS IN NRZ MODE (CCR1.6 = 1).
PBEO
RNEG
(Note 3)
RCLK
(Note 1)
RCLK
(Note 2)
A
=-40°C to +85°C.)
t DD
t DD
ERROR
BIT
(Figure
SYMBOL
t
t
t
t
t
t
CH
CH
DD
BPV/
EXZ/
CV
CP
CL
CL
10-9)
54 of 60
(Note 1)
(Note 2)
(Note 3)
(Note 4)
CONDITIONS
PRBS DETECTOR OUT OF SYNC
t
CL
BPV/
EXZ/
CV
MIN
200
150
t CP
t
CH
TYP
488
648
MAX
50.0
UNITS
ns
ns
ns
ns

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