PSMN9R0-25MLC,115 NXP Semiconductors, PSMN9R0-25MLC,115 Datasheet

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PSMN9R0-25MLC,115

Manufacturer Part Number
PSMN9R0-25MLC,115
Description
MOSFET N-channel MOSFET logic level LFPAK33
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PSMN9R0-25MLC,115

Rohs
yes
Transistor Polarity
N-Channel
Drain-source Breakdown Voltage
25 V
Gate-source Breakdown Voltage
1.95 V
Continuous Drain Current
55 A
Resistance Drain-source Rds (on)
11.3 mOhms
Mounting Style
SMD/SMT
Package / Case
LFPAK33
Power Dissipation
45 W
Factory Pack Quantity
1500
1. Product profile
Table 1.
Symbol
V
I
P
T
Static characteristics
R
Dynamic characteristics
Q
Q
D
j
DS
tot
DSon
GD
G(tot)
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
junction temperature
drain-source on-state
resistance
gate-drain charge
total gate charge
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is
designed and qualified for use in a wide range of industrial, communications and domestic
equipment.
PSMN9R0-25MLC
N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33
using NextPower Technology
Rev. 3 — 15 June 2012
Low parasitic inductance and
resistance
Optimised for 4.5V Gate drive utilising
NextPower Superjunction technology
DC-to-DC converters
Load switching
Conditions
T
T
V
see
V
see
V
see
see
V
see
see
T
mb
mb
GS
GS
GS
GS
j
= 25°C
Figure 10
Figure 10
Figure
Figure 13
Figure
Figure 13
= 25 °C; V
= 25 °C; see
= 4.5 V; I
= 10 V; I
= 4.5 V; I
= 4.5 V; I
12;
12;
D
D
D
D
GS
= 15 A; T
= 15 A; T
= 15 A; V
= 15 A; V
Figure 2
= 10 V; see
j
j
DS
DS
= 25 °C;
= 25 °C;
= 12.5 V;
= 12.5 V;
Figure 1
Ultra low QG, QGD, & QOSS for high
system efficiencies at low and high
loads
Synchronous buck regulator
Min
-
-
-
-55
-
-
-
-
Product data sheet
Typ
-
-
-
-
9.8
7.55
1.2
5.4
Max
25
55
45
175
11.3
8.65
-
-
°C
mΩ
Unit
V
A
W
mΩ
nC
nC

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PSMN9R0-25MLC,115 Summary of contents

Page 1

... PSMN9R0-25MLC N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Rev. 3 — 15 June 2012 1. Product profile 1.1 General description Logic level enhancement mode N-channel MOSFET in LFPAK33 package. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment ...

Page 2

... ° j(init) ≤ Ω; unclamped; V sup GS see Figure 3 All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC Graphic symbol mbb076 Version SOT1210 Min Max - 25 -20 20 Figure Figure 1 ...

Page 3

... Fig ( All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC 100 150 Normalized total power dissipation as a function of mounting base temperature 003aaj793 (1) ( (ms) AL © NXP B.V. 2012. All rights reserved. ...

Page 4

... Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN9R0-25MLC Product data sheet Limit DSon Conditions see Figure All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC =10 μ 100 μ 100 Min Typ - 3 ...

Page 5

... Figure 12; see Figure 12 see Figure 12; see Figure 12 MHz °C; see Figure 14 j All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC Min Typ Max 22 1.3 1.5 1. 100 - - ...

Page 6

... DS 003aaj796 30 R DSon (mΩ 2.8 15 2 ( (V) DS Fig 7. Drain-source on-state resistance as a function of gate-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC Min Typ Max - 0. ...

Page 7

... I (A) D Fig 9. 003aaj802 3 3.5 4 (A) D Fig 11. Normalized drain-source on-state resistance All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC ( 150 ° ° Transfer characteristics; drain current as a function of gate-source voltage; typical values ...

Page 8

... Fig 13. Gate-source voltage as a function of gate 003aaj805 C iss C oss C rss (V) DS Fig 15. Source current as a function of source-drain All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC charge ...

Page 9

... N-channel 25 V 8.65 mΩ logic level MOSFET in LFPAK33 using NextPower Technology Fig 16. Reverse recovery timing definition PSMN9R0-25MLC Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC 003a a f 444 0. © NXP B.V. 2012. All rights reserved ...

Page 10

... detail X 0 2.5 scale (1) ( 2.35 3.40 2.45 0.65 1.90 3.20 2.00 References JEDEC JEITA All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC θ θ ° 3.40 0.25 0.50 8 0.65 0.20 0.10 ° 3.20 0.13 0.30 0 European ...

Page 11

... Various changes to content. PSMN9R0-25MLC v.2 20120607 PSMN9R0-25MLC Product data sheet Data sheet status Change notice Product data sheet - Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC Supersedes PSMN9R0-25MLC v.2 PSMN9R0-25MLC v.1 © NXP B.V. 2012. All rights reserved ...

Page 12

... Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC © NXP B.V. 2012. All rights reserved ...

Page 13

... Plus,MIFARE Ultralight,MoReUse,QLPAK,Silicon Tuner,SiliconMAX,SmartXA,STARplug,TOPFET,TrenchMOS,TriMedia andUCODE — are trademarks of NXP B.V. HD Radio andHD Radio logo — are trademarks of iBiquity Digital Corporation. to:salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 3 — 15 June 2012 PSMN9R0-25MLC © NXP B.V. 2012. All rights reserved ...

Page 14

... Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Document identifier: PSMN9R0-25MLC All rights reserved. Date of release: 15 June 2012 ...

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