M25PE20-VMN6TP NUMONYX, M25PE20-VMN6TP Datasheet - Page 33

• Manufacturer Part Number: M25PE20-VMN6TP
• Description: IC FLASH 2MBIT 75MHZ 8SOIC
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25PE20-VMN6TP

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 2M (256K x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Cell Type: NOR
• Density: 2Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC N
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 256K
• Supply Current: 8mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M25PE20-VMN6TPTR

M25PE20, M25PE10
6.8
Note:
Read Lock Register (RDLR)
The Read Lock Register (RDLR) instruction is decoded only in the T9HX process (see
Important note on page
The device is first selected by driving Chip Select (S) Low. The instruction code for the Read
Lock Register (RDLR) instruction is followed by a 3-byte address (A23-A0) pointing to any
location inside the concerned sector (or subsector). Each address bit is latched-in during
the rising edge of Serial Clock (C). Then the value of the Lock Register is shifted out on
Serial Data output (Q), each bit being shifted out, at a maximum frequency f
falling edge of Serial Clock (C).
The instruction sequence is shown in
The Read Lock Register (RDLR) instruction is terminated by driving Chip Select (S) High at
any time during data output.
Any Read Lock Register (RDLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Table 11.
Figure 15. Read Lock Register (RDLR) instruction sequence and data-out sequence
b7-b4
S
C
D
Q
Bit
b1
b0
Sector Write
Sector Lock
Bit name
0
Lock Registers
Down
Lock
1
High Impedance
2
Instruction
3
4
6).
Value
5
‘1’
‘0’
‘1’
‘0’
6
The Write Lock and Lock Down bits cannot be changed. Once a
‘1’ is written to the Lock Down bit it cannot be cleared to ‘0’,
except by a reset or power-up.
The Write Lock and Lock Down bits can be changed by writing
new values to them (default value).
Write, program and erase operations in this sector will not be
executed. The memory contents will not be changed.
Write, program and erase operations in this sector are executed
and will modify the sector contents (default value).
7
MSB
23
8
22 21
9 10
Figure
24-bit address
15.
Reserved
3
28 29 30 31 32 33 34 35
2
1
0
MSB
Function
7
6
Lock Register Out
5
4
3
36 37 38
2
1
C
, during the
0
39
Instructions
AI10783
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