M25PX80-VMP6TG NUMONYX, M25PX80-VMP6TG Datasheet - Page 22

• Manufacturer Part Number: M25PX80-VMP6TG
• Description: IC FLASH 8MBIT 75MHZ 8VFQFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M25PX80-VMP6TG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 75MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VFQFN, 8-VFQFPN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M25PX80-VMP6TGTR

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Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 8.
Read Identification (RDID)
The Read Identification (RDID) instruction allows to read the device identification data:
The manufacturer identification is assigned by JEDEC, and has the value 20h for Numonyx.
The device identification is assigned by the device manufacturer, and indicates the memory
type in the first byte (71h), and the memory capacity of the device in the second byte (14h).
The UID contains the length of the following data in the first byte (set to 10h) and 16 bytes of
the optional Customized Factory Data (CFD) content. The CFD bytes are read-only and can
be programmed with customers data upon their demand. If the customers do not make
requests, the devices are shipped with all the CFD bytes programmed to zero (00h).
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Write lo Lock Register (WRLR) instruction completion
Page Program (PP) instruction completion
Dual Input Fast Program (DIFP) instruction completion
Program OTP (POTP) instruction completion
Subsector Erase (SSE) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Manufacturer identification (1 byte)
Device identification (2 bytes)
A Unique ID code (UID) (17 bytes, of which 16 available upon customer request).
Write Disable (WRDI) instruction sequence
S
C
DQ0
DQ1
High Impedance
0
(Figure
1
2
Instruction
8) resets the Write Enable Latch (WEL) bit.
3
4
5
6
7
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