M45PE80-VMP6TG NUMONYX, M45PE80-VMP6TG Datasheet - Page 20

• Manufacturer Part Number: M45PE80-VMP6TG
• Description: IC FLASH 8MBIT 50MHZ 8VFQFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of M45PE80-VMP6TG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 8M (1M x 8)
• Speed: 50MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-VFQFN, 8-VFQFPN
• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 12ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: VFQFPN
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 1M
• Supply Current: 4mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: M45PE80-VMP6TG; M45PE80-VMP6TGTR

6.4
6.4.1
6.4.2
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Figure 8.
Read Status Register (RDSR)
The Read Status Register (RDSR) instruction allows the Status Register to be read. The
Status Register may be read at any time, even while a Program, Erase or Write cycle is in
progress. When one of these cycles is in progress, it is recommended to check the Write In
Progress (WIP) bit before sending a new instruction to the device. It is also possible to read
the Status Register continuously, as shown in
The status bits of the Status Register are as follows:
WIP bit
The Write In Progress (WIP) bit indicates whether the memory is busy with a Write, Program
or Erase cycle. When set to 1, such a cycle is in progress, when reset to 0 no such cycle is
in progress.
WEL bit
The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
When set to 1 the internal Write Enable Latch is set, when set to 0 the internal Write Enable
Latch is reset and no Write, Program or Erase instruction is accepted.
Table 5.
1. WEL and WIP are volatile read-only bits (WEL is set and reset by specific instructions; WIP is
S
C
D
Q
automatically set and reset by the internal logic of the device).
b7
0
Read Identification (RDID) instruction sequence and data-out sequence
Status Register Format
0
High Impedance
1
0
2
Instruction
3
4
5
0
6
7
MSB
Manufacturer Identification
8
0
9 10 11 12 13 14 15
Figure
0
9.
MSB
15 14 13
16 16 18
Device Identification
0
3
28 29 30 31
WEL
2
(1)
1
0
WIP
AI06809
b0
(1)