MT48H4M16LFB4-8 IT Micron Technology Inc, MT48H4M16LFB4-8 IT Datasheet - Page 28

• Manufacturer Part Number: MT48H4M16LFB4-8 IT
• Description: IC SDRAM 64MBIT 125MHZ 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H4M16LFB4-8 IT

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 9:
Notes: 1-6; notes appear below and on next page
NOTE:
pdf: 09005aef80a63953, source: 09005aef808a7edc
Y25L_64Mb_2.fm - Rev. E 11/04 EN
1. This table applies when CKE
2. This table describes alternate bank operation, except where noted; i.e., the current state is for bank n and the com-
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH and LOAD MODE REGISTER commands may only be issued when all banks are idle.
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank represented by the current
6. All states and sequences not shown are illegal or reserved.
Precharging
(With Auto
(With Auto
ous state was self refresh).
mands shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given com-
mand is allowable). Exceptions are covered in the notes below.
state only.
Activating,
Precharge)
Precharge)
CURRENT
Precharge
Precharge
Active, or
Disabled)
Disabled)
Idle:
Row Active: A row in the bank has been activated, and
Read:
Write:
Read w/Auto Precharge Enabled: Starts with registration of a READ command with auto precharge enabled, and
Write w/Auto Precharge Enabled: Starts with registration of a WRITE command with auto precharge enabled, and
STATE
(Auto
(Auto
Write
Write
Read
Read
Row
Any
Idle
Truth Table 4 – Current State Bank n, Command to Bank m
The bank has been precharged, and
ter accesses are in progress.
A READ burst has been initiated, with auto precharge disabled, and has not yet terminated or been
terminated.
A WRITE burst has been initiated, with auto precharge disabled, and has not yet terminated or been
terminated.
ends when
ends when
CS#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS
X
H
X
H
H
H
H
H
H
H
H
H
H
#
L
L
L
L
L
L
L
L
L
L
t
t
RP has been met. Once
RP has been met. Once
n-1
CAS
X
H
X
H
H
H
H
H
H
H
H
H
H
#
L
L
L
L
L
L
L
L
L
L
was HIGH and CKE
WE# COMMAND (ACTION)
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
COMMAND INHIBIT (NOP/Continue previous operation)
NO OPERATION (NOP/Continue previous operation)
Any Command Otherwise Allowed to Bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
t
t
n
RP is met, the bank will be in the idle state.
RP is met, the bank will be in the idle state.
t
RP has been met.
is HIGH (see Truth Table 2) and after
28
t
RCD has been met. No data bursts/accesses and no regis-
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
XSR has been met (if the previ-
MOBILE SDRAM
©2003 Micron Technology, Inc. All rights reserved.
64Mb: x16
NOTES
7, 8, 14
7, 8, 15
7, 8, 16
7, 8, 17
7, 10
7, 11
7, 12
7, 13
7
7
9
9
9
9